ST7LCR

14/29

4.3

Supply and reset characteristics

otherwise specified.

4.4

Clock and timing characteristics

4.4.1

General timings

Output high to low level fall time for high

68

13

ns

Output high to low level fall time for

standard I/O port pins (Port A, B or C)(2)

18

23

Output L-H rise time (Port D)(2)

79

14

Output L-H rise time for standard I/O port

pins (Port A, B or C)(2)

19

28

External interrupt pulse time

1

1.

Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.

2.

Guaranteed by design, not tested in production.

Table 8.

I/O port pins characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 9.

Low voltage detector and supervisor (LVDs)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

3.7

3.9

V

3.3

3.5

V

(1)

1.

Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.

200

mV

(1)

20

ms/V

Table 10.

General timings

Symbol

Parameter

Conditions

Min

1.

Data based on typical application software.

Max

Unit

Instruction cycle time

23

12

500

750

3000

ns

Interrupt reaction time

(2)

2.

Time measured between interrupt event and interrupt vector fetch.

∆t

needed to finish the current instruction execution.

10

22

2.5

5.5

µs