LTC4002 datasheet(4/24 Pages) LINER

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LTC3783

3783f

The

● denotes specifications which apply over the full operating temperature range, otherwise specifications are TJ = 25°C.

VIN = 12V, VRUN = 1.5V, VSYNC = 0V, VFBP = VREF, RT = 20k, unless otherwise specified.

ELECTRICAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Low Dropout Regulator

VINTVCC

INTVCC Regulator Output Voltage

VOV/FB = 1.5V

●

6.5

7.5

UVLO

INTVCC Undervoltage Lockout

Rising INTVCC

2.3

2.5

Thresholds

Falling INTVCC

1.8

2.1

Hysteresis

0.2

∆VINTVCC

INTVCC Line Regulation

12V

≤ VIN ≤ 36V

mV/V

∆VIN

∆VLDO(LOAD)

INTVCC Load Regulation

≤ IINTVCC ≤ 10mA

–1

–0.1

VDROPOUT

INTVCC Dropout Voltage

VIN = 7V, IINTVCC = 10mA

300

500

IINTVCC(SD)

Bootstrap Mode INTVCC Supply

VSENSE = 0V

µA

Current in Shutdown

VSENSE = 7V

µA

GATE/PWMOUT Drivers

tr(GATE)

GATE Driver Output Rise Time

CL = 3300pF (Note 7)

tf(GATE)

GATE Driver Output Fall Time

CL = 3300pF (Note 7)

IPK(GATE,RISE)

GATE Driver Peak Current Sourcing

VGATE = 0V

0.5

IPK(GATE,FALL)

GATE Driver Peak Current Sinking

VGATE = 7V

VPWMIN

PWMIN Pin Input Threshold Voltages

Rising PWMIN

1.6

Falling PWMIN

0.8

Hysteresis

0.8

RPWMIN

PWMIN Input Pull-Up Resistance

100

Ω

tr(PWMOUT)

PWMOUT Driver Output Rise Time

CL = 3300pF (Note 7)

tf(PWMOUT)

PWMOUT Driver Output Fall Time

CL = 3300pF (Note 7)

IPK(PWMOUT,RISE) PWMOUT Driver Peak Current Sourcing

VPWMOUT = 0V

0.25

IPK(PWMOUT,FALL) PWMOUT Driver Peak Current Sinking

VPWMOUT = 7V

0.50

Note 1: Absolute Maximum Ratings are those values beyond which the life

of the device may be impaired.

Note 2: The LTC3783E is guaranteed to meet performance specifications

from 0

°C to 85°C junction temperature. Specifications over the –40°C to

°C operating temperature range are assured by design, characterization

and correlation with statistical process controls.

Note 3: TJ is calculated from the ambient temperature TA and power

dissipation PD according to the following formula:

TJ = TA + (PD • 43°C/W) for the DFN

TJ = TA + (PD • 38°C/W) for the TSSOP

Note 4: The dynamic input supply current is higher due to power MOSFET

gate charging (QG • fOSC). See Operation section.

Note 5: The LTC3783 is tested in a feedback loop which servos VFBN to

VFBP = VVREF with the ITH pin forced to the midpoint of its voltage range

(0.3V

≤ VITH ≤ 1.2V; midpoint = 0.75V).

Note 6: In a synchronized application, the internal slope compensation is

increased by 25%. Synchronizing to a significantly higher ratio will reduce

the effective amount of slope compensation, which could result in sub-

harmonic oscillation for duty cycles greater than 50%

Note 7: Rise and fall times are measured at 10% and 90% levels.

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