 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
CMV50000 датащи(PDF) 64 Page - ams-OSRAM AG |
|
|
|||||||||||||||||||||||||||||
CMV50000 датащи(HTML) 64 Page - ams-OSRAM AG |
|
|
64 / 137 page  Document Feedback CMV50000 Functional Description Datasheet • PUBLIC DS000522 • v4-00 • 2023-Aug-03 136 │ 63 Figure 69: Set PLL Sequence # Bank Address Value 1 0 106 0 2 0 110 0 3 0 114 0 4 0 107 pll1_pre_div (see calculation below) 5 0 109 pll1_clkout_sel (see calculation below) 6 0 108 pll1_ndiv (see calculation below) 7 0 112 pll2_ndiv (see calculation below) 8 0 114 1 9 0 106 1 10 0 110 1 The parameter pll1_pre_div depends only on the frequency of the sensor input clock CLK_IN (between 6 MHz and 96 MHz). Figure 70: CLK_IN Divider Selection CLK_IN pll1_pre_div 6 MHz – 12 MHz 0 12 MHz – 24 MHz 1 24 MHz – 48 MHz 2 48 MHz – 96 MHz 3 The parameter pll1_clkout_sel depends only on the targeted output data rate. Figure 71: Data Rate Selection Target Output Data Rate pll1_clkout_sel 460 – 830 Mbit/s 0 230 – 460 Mbit/s 1 120 – 230 Mbit/s 2 The parameter pll1_ndiv depends on the frequency of the sensor input clock CLK_IN as well as the desired output data rate. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
