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ISO6431FDFPR датащи(PDF) 32 Page - Texas Instruments

номер детали ISO6431FDFPR
подробное описание детали  ISO643x General-Purpose, Basic and Reinforced, Triple-Channel Digital Isolators
PDF  48 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

ISO6431FDFPR датащи(HTML) 32 Page - Texas Instruments

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9.4.2 Layout Example
I/O pins
routed on top
or on
alternate
layers (with
vias)
Solid ground
planes reduce
ground
inductance and
dissipate heat
through PCB
Solid supply islands reduce
inductance because large
peak currents flow into the
VCC pin
1
2
3
4
5
7
8
16
9
6
15
14
13
12
10
11
GND2
GND1
Ground
Plane
(2
nd Layer)
Ground
Plane
(2
nd Layer)
GND1
GND2
EN1
EN2
0.1µF capacitance
0.5mm maximum from
VCC1 to GND1, low
inductance vias to
ground plane
0.1µF capacitance
0.5mm maximum from
VCC2 to GND2, low
inductance vias to
ground plane
low inductance vias to
ground plane at GND
pins
low inductance vias to
ground plane at GND
pins
VCC1
VCC2
Figure 9-6. Layout Example
10 mils
10 mils
40 mils
FR-4
0r ~ 4.5
Keep this
space free
from planes,
traces, pads,
and vias
Ground plane
Power plane
Low-speed traces
High-speed traces
Figure 9-7. Layout Example PCB Cross Section
ISO6431
SLVSJ22 – JUNE 2026
www.ti.com
32
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Product Folder Links: ISO6431



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