AS3701 datasheet(38/110 Pages) AMSOSRAM

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ams Datasheet

Page 37

[v1-11] 2016-Dec-14

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AS3701 − Detailed Description – System Functions

Figure 44:

Start-Up Sequence Diagram 3/5

Start-Up Sequence: This diagram shows the timing of a startup from power-off mode via USB charger detection

event (battery connected, VSUP > ResVoltRise)

Figure 45:

Start-Up Sequence Diagram 4/5

Start-Up Sequence: This diagram shows the timing of a I2C or internal initiated reset command followed by a

startup (battery and/or USB charger adapter connected, VSUP > ResVoltRise)

Reg1_addr (b0:3 fuse aah)

VBAT = VSUP > ResVoltRise

5ms debounce

VSUP >

ResVoltRise

0ms delay (if Reg4_delay =0)

1ms delay (if Reg4_delay = 1 and del_time =0)

4ms delay (if Reg4_delay = 1 and del_time =1)

Reg4_addr (b4:7 fuse adh)

0ms delay (if Reg1_delay =0)

1ms delay (if Reg1_delay = 1 and del_time =0)

4ms delay (if Reg1_delay = 1 and del_time =1)

10..150ms set by res_timer in O TP

XRES

PWRGood

1ms delay

between last timeslot (regulator) and

PWRGood signal going high

reg1_V (b0:7 fuse abh)

reg4_V (b0:7 fuse afh)

2ms

oscillator

stable

USB

4ms

USB detect

debounce

USB charger detection (VUSB > VBAT)

Reg1_addr

(b0:3 fuse aah)

VSUP > ResVoltRise

5ms debounce

VSUP >

ResVoltRise

Reg4_addr

(b4:7 fuse adh)

0ms delay (if Reg1_delay =0)

1ms delay (if Reg1_delay = 1 and del_time =0)

4ms delay (if Reg1_delay = 1 and del_time =1)

10..150ms set by res_timer in OTP

XRES

0ms delay (if Reg4_delay =0)

1ms delay (if Reg4_delay = 1 and del_time =0)

4ms delay (if Reg4_delay = 1 and del_time =1)

PWRGood

1ms delay

between last timeslot (regulator) and

PWRGood signal going high

reg1_V (b0:7 fuse abh)

reg4_V (b0:7 fuse afh)

8ms

OFF delay

I2C or

internal reset

command

SDA

0, 8, 16 or 32ms OFF delay

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