AS3418-EWLT datasheet(70/78 Pages) AMSOSRAM

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AS3418

Datasheet

• PUBLIC

DS000507

• v4-00 • 2020-Jan-23

│ 69

7.2.7

EEPROM Control Registers

Figure 93:

EEPROM_CONTROL Register Description

Addr: 0x34

EEPROM_CONTROL

Bit

Bit Name

Default

Access

Bit Description

EEPROM_UP

LOAD_TEST

R/W

The register bit supports an EEPROM upload test

function which simulates an EEPROM write without

executing the actual write in order to check if the

supply voltage is high enough for proper EEPROM

programming. Once the bit is set, the test is started

automatically and cleared after the test in finished.

The result, if the test was positive, can be read out in

0: EEPROM upload test disabled

1: EEPROM upload test started

EEPROM_UP

LOAD

R/W

This register triggers the EEPROM upload function

which copies all register content of AS3418 to the

AS3418 to store it permanently to the device. Once

the upload is completed the bit is cleared

automatically. The success of the EEPROM upload

can be read out in register EE_READY.

0: EEPROM upload function disabled

1: EEPROM upload function started

EEPROM_DO

WNLOAD

R/W

This register triggers the EEPROM download

function which copies all EEPROM content to the

AS3418 configuration regsiters. Once the download

is completed the bit is cleared automatically. The

success of the EEPROM download can be read out

in register EE_READY.

0: EEPROM upload function disabled

1: EEPROM upload function started

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