LRI64_08 datasheet(14/52 Pages) STMICROELECTRONICS

номер детали	LRI64

подробное описание детали	Memory tag IC at 13.56 MHz, with 64-bit unique ID and WORM user area, ISO 15693 and ISO 18000-3 Mode 1 compliant

PDF	52 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

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Communications signal from LRI64 to VCD

LRI64

14/52

Communications signal from LRI64 to VCD

ISO 15693 and ISO 18000-3 Mode 1 standards define several modes, for some parameters,

to cater for use in different application requirements and noise environments. The LRI64

does not support all of these modes, but supports the single subcarrier mode at the fast

data rate.

8.1

Load modulation

The LRI64 is capable of communication to the VCD via the inductive coupling between the

two antennas. The carrier is loaded, with a subcarrier with frequency fS, generated by

switching a load in the LRI64.

The amplitude of the variation to the signal, as received on the VCD antenna, is at least

10 mV, when measured as described in the test methods defined in International Standard

ISO 10373-7.

8.2

Subcarrier

The LRI64 supports the one subcarrier modulation response format. This format is selected

by the VCD using the first bit in the protocol header.

The frequency, fS, of the subcarrier load modulation is 423.75 kHz (=fC/32).

8.3

Data rate

The LRI64 response uses the high data rate format (26.48 Kbit/s). The selection of the data

rate is made by the VCD using the second bit in the protocol header.

8.4

Bit representation and coding using one subcarrier, at the

high data rate

Data bits are encoded using Manchester coding, as described in Figure 9 and Figure 10.

8.4.1

Logic 0

A logic 0 starts with 8 pulses of 423.75 kHz (fC/32) followed by an unmodulated period of

18.88 µs as shown in Figure 9.

Figure 9.

Logic 0, high data rate

AI06663

37.76 µs

LRI64 датащи(PDF) 14 Page - STMicroelectronics