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TRF2001VBAR датащи(PDF) 7 Page - Texas Instruments |
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TRF2001VBAR датащи(HTML) 7 Page - Texas Instruments |
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7 / 30 page ![]() 5.5 Electrical Characteristics (continued) at TA = 25°C, VCC_PA = 3.3V, VCC = 3.3V, f = 915MHz, shorted RX_FLT and LNA_IN pins, shorted TX_FLT and PA_IN pins, RF transmit specifications from TR to ANT pin, RF receive specifications from ANT to TR pin, 50Ω source and load at input and output RF pins, respectively; measured on EVM and de-embedded up to the device pins (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DC SPECIFICATIONS ICC_PA VCC_PA supply current TX mode PO = 27dBm 351 mA PO = 24dBm 260 No RF 60.7 RX mode, PIN = –27dBm 0.3 ICC VCC supply current TX mode PO = 27dBm 35 mA PO = 24dBm 22 No RF 7 RX mode, PIN = –27dBm 10 Powerdown supply current(2) No RF 0.05 1 µA DIGITAL CONTROL LOGIC SPECIFICATIONS VIH High voltage threshold With respect to GND High (logic 1) 1.6 3.3 3.45 V VIL Low voltage threshold Low (logic 0) 0 0.5 V IIH Pin-high input current Pin voltage = 3.3V 1 µA IIL Pin-low input current Pin voltage = 0V 1 µA (1) No external filter on ANT pin. Refer to Figure 5-4 for higher order harmonic performance. (2) Sum of currents into the VCC_PA and VCC pins. 5.6 Timing Requirements MIN NOM MAX UNIT RF TRANSMIT tON Turn-on time: time for RF output power at ANT to reach 90% of final value from 50% of CTR edge 1.4 µs tOFF Turn-off time: time for RF output power at ANT to reach 10% of final value from 50% of CTR edge 0.1 µs RF RECEIVE tON Turn-on time: time for RF output power at TR to reach 90% of final value from 50% of CTR edge 0.8 µs tOFF Turn-off time: time for RF output power at TR to reach 10% of final value from 50% of CTR edge 0.1 µs 5.7 Digital Mode Control Logic Device Pin Configuration Description CEN CIB CTR 1 0 0 Not supported 1 1 0 RX mode: RX path enabled (RF receive), TX PA powered down 1 0 1 Not supported 1 1 1 TX mode: TX path enabled (RF transmit) 0 X(1) X(1) Power down mode: Device in powered down state 0 0 0 Guaranteed powered down supply current state (1) Pin logic is ignored www.ti.com TRF2001 SLVSK83 – APRIL 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TRF2001 |
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