M48T201Y datasheet(20/33 Pages) STMICROELECTRONICS

20 / 33 page

M48T201Y, M48T201V

20/33

Calibrating the Clock

The M48T201Y/V is driven by a quartz controlled

oscillator with a nominal frequency of 32,768Hz.

The devices are factory calibrated at 25°C and

tested for accuracy. Clock accuracy will not ex-

ceed ±35 ppm (parts per million) oscillator fre-

quency error at 25°C, which equates to about

±1.53 minutes per month. When the Calibration

circuit is properly employed, accuracy improves to

better than +1/–2 ppm at 25°C.

The oscillation rate of crystals changes with tem-

perature

(see

Figure

11., page 21).

The

M48T201Y/V design employs periodic counter

correction. The calibration circuit adds or subtracts

counts from the oscillator divider circuit at the di-

vide

256

stage,

shown

Figure

12., page 21.

The number of times pulses which are blanked

(subtracted, negative calibration) or split (added,

positive calibration) depends upon the value load-

ed into the five Calibration bits found in the Control

tracting counts slows the clock down.

The Calibration bits occupy the five lower order

bits (D4-D0) in the Control Register 7FFF8h.

These bits can be set to represent any value be-

tween 0 and 31 in binary form. Bit D5 is a Sign Bit;

'1' indicates positive calibration, '0' indicates nega-

tive calibration (see Figure 12., page 21). Calibra-

tion occurs within a 64 minute cycle. The first 62

minutes in the cycle may, once per minute, have

one second either shortened by 128 or lengthened

by 256 oscillator cycles. If a binary '1' is loaded into

the register, only the first 2 minutes in the 64

minute cycle will be modified; if a binary 6 is load-

ed, the first 12 will be affected, and so on.

Therefore, each calibration step has the effect of

adding 512 or subtracting 256 oscillator cycles for

every 125,829,120 actual oscillator cycles, that is

+4.068 or –2.034 ppm of adjustment per calibra-

tion step in the calibration register. Assuming that

the oscillator is running at exactly 32,768Hz, each

of the 31 increments in the Calibration byte would

represent +10.7 or –5.35 seconds per month

which corresponds to a total range of +5.5 or –2.75

minutes per month.

Two methods are available for ascertaining how

much calibration a given M48T201Y/V may re-

quire. The first involves setting the clock, letting it

run for a month and comparing it to a known accu-

rate reference and recording deviation over a fixed

period of time. Calibration values, including the

number of seconds lost or gained in a given peri-

od, can be found in the STMicroelectronics Appli-

cation

Note

AN934,

“TIMEKEEPER®

CALIBRATION.” This allows the designer to give

the end user the ability to calibrate the clock as the

environment requires, even if the final product is

packaged in a non-user serviceable enclosure.

The designer could provide a simple utility that ac-

cesses the Calibration byte.

The second approach is better suited to a manu-

facturing environment, and involves the use of the

IRQ/FT pin. The pin will toggle at 512Hz, when the

Stop Bit (ST, D7 of 7FFF9h) is '0,' the Frequency

Test Bit (FT, D6 of 7FFFCh) is '1,' the Alarm Flag

Enable Bit (AFE, D7 of 7FFF6h) is '0,' and the

Watchdog Steering Bit (WDS, D7 of 7FFF7h) is '1'

or the Watchdog Register (7FFF7h=0) is reset.

Note: A 4-second settling time must be allowed

before reading the 512Hz output.

Any deviation from 512Hz indicates the degree

and direction of oscillator frequency shift at the test

temperature.

For

example,

reading

512.010124Hz would indicate a +20 ppm oscillator

frequency error, requiring a –10 (WR001010) to be

loaded into the Calibration Byte for correction.

Note that setting or changing the Calibration Byte

does not affect the Frequency Test output fre-

quency.

The IRQ/FT pin is an open drain output which re-

quires a pull-up resistor to VCC for proper opera-

tion. A 500-10k

Ω resistor is recommended in order

to control the rise time. The FT Bit is cleared on

power-down.

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