Single-Supply, Low-Power,

2-Channel, Serial 8-Bit ADCs

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13

Table 1. Control Byte Format

Table 2. Conversion Configuration

Table 3. Full- and Zero-Scale Voltages

*RI = Reference Input (Table 2)

START

SEL2

SEL1

SEL0

I/ECLK

I/EREF

REFSHDN

SHDN

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

(MSB)

(LSB)

NAME

I/EREF

2

BIT

1 = internal reference, 0 = external reference. Internal reference selects +2.048V (MAX1108) or

+4.096V (MAX1109), or an external reference can be applied to the REF pin.

DESCRIPTION

I/ECLK

3

START

1 = external clock, 0 = internal clock. The SAR can be driven by the internal oscillator, or with the

SCLK signal.

SHDN

0 (LSB)

7 (MSB)

1 = operational, 0 = power down. For a full power down set REFSHDN = SHDN = 0. (See Power-

Down Mode section.)

The first logic “1” bit after CS goes low defines the beginning of the control byte.

SEL2

SEL1

SEL0

6

5

4

Selects the mode of operation (Table 2).

REFSHDN

1

1 = operational (if I / EREF = 1), 0 = reference shutdown. When using an external reference, power

consumption can be minimized by powering down the internal reference separately (I / EREF = 0).

REFSHDN must be set to 0 when SHDN = 0.

UNIPOLAR MODE

RI*

Zero Scale

RI

Negative

Full Scale

Full Scale

Zero

Scale

BIPOLAR MODE

Positive

Full Scale

SEL2

1

1

1

1

SEL1

SAMPLED INPUT

(SI)

SEL0

0

1

CH1

CH0

CONVERSION MODE

REFERENCE INPUT

(RI)

COM

COM

Unipolar

Unipolar

1

0

1

0

1

CH1

CH0

0

GND

GND

Unipolar

Unipolar

0

0

0

1

1

CH1

CH0

1

COM

COM

Bipolar

Bipolar

0

0

0

0

1

CH0

0

GND

CH1

Unipolar

Bipolar