HT47C20 datasheet(13/46 Pages) HOLTEK

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HT47C20

Rev. 1.60

July 26, 2002

No.

Interrupt Source

Priority Vector

External interrupt

04H

Time base interrupt

08H

Real time clock interrupt

0CH

Timer/event counter interrupt

10H

The external interrupt request flag (EIF), real time clock in-

terrupt request flag (RTF), time base interrupt request flag

(TBF), enable external interrupt bit (EEI), enable real time

clock interrupt bit (ERTI), enable time base interrupt bit

(ETBI), and enable master interrupt bit (EMI) constitute an

interrupt control register 0 (INTC0) which is located at 0BH

in the data memory. The timer/event counter interrupt re-

quest flag (TF), enable timer/event counter interrupt bit

(ETI) on the other hand, constitute an interrupt control reg-

ister 1 (INTC1) which is located at 1EH in the data mem-

ory. EMI, EEI, ETI, ETBI, and ERTI are used to control the

enabling/disabling of interrupts. These bits prevent the re-

quested interrupt being serviced. Once the interrupt re-

quest flags (RTF, TBF, TF, EIF) are set, they remain in the

INTC1 or INTC0 respectively until the interrupts are ser-

viced or cleared by a software instruction.

It is recommended that a program does not use the

²CALL subroutine² within the interrupt subroutine. Be-

cause interrupts often occur in an unpredictable manner

or need to be serviced immediately in some applica-

tions, if only one stack is left, and enabling the interrupt

is not well controlled, once the

²CALL subroutine² oper-

ates in the interrupt subroutine will damage the original

control sequence.

Oscillator configuration

There are two oscillator circuits in the HT47C20. Both are

designed for system clocks; the RC oscillator and the crys-

tal oscillator, which are determined by mask option. No mat-

ter what oscillator type is selected, the signal provides the

system clock. The HALT mode stops the system oscillator

and ignores an external signal to conserve power. The

OSC1 and OSC2 are at the same level when the system

enters the power down mode.

If an RC oscillator is used, an external resistor between

OSC1 and OSC2 is need and the resistance must range

from 51k

W to 1MW. The RC oscillator provides the most

cost effective solution. However, the frequency of the

oscillation may vary with VDD, temperature and the chip

itself due to process variations. It is, therefore, not suit-

able for timing sensitive operations where accurate os-

cillator frequency is desired.

If a crystal oscillator is used, a crystal across OSC1 and

OSC2 is needed to provide the feedback and phase

shift needed for oscillator, no other external components

are needed. Instead of a crystal, a resonator can also be

connected between OSC1 and OSC2 to get a frequency

reference, but two external capacitors in OSC1 and

OSC2 are required.

There is another oscillator circuit designed for the real

time clock. In this case, only the 32768kHz crystal oscil-

lator can be applied. The crystal should be connected

between OSC3 and OSC4, and two external capacitors

along with one external resistor are required for the os-

cillator circuit in order to get a stable frequency.

The RTC oscillator circuit can be controlled to oscillate

quickly by setting

²SAVE² bit (bit 4 of RTCC) to ²0². After

power on reset, the

²SAVE² bit initial value is ²0² that is on

the quick-oscillate mode. It

¢s recommended to turn it off

by setting the

²SAVE² bit ²1² after a period of about 2 sec-

ondstoavoiddrainingextrapower.

The WDT oscillator is a free running on-chip RC oscilla-

tor, and no external components are required. Even if

the system enters the power down mode, the system

clock is stopped, but the WDT oscillator still works with a

period of approximately 90

ms. The WDT oscillator can

be disabled by mask option to conserve power.

Watchdog Timer

- WDT

The clock source of the WDT(fS) is implemented by a

dedicated RC oscillator (WDT oscillator) or a instruction

clock (system clock divided by 4) or a real time clock os-

cillator (RTC oscillator), decided by mask options. The

timer is designed to prevent a software malfunction or

sequence jumping to an unknown location with unpre-

dictable results. The Watchdog Timer can be disabled

by a mask option. If the Watchdog Timer is disabled, all

the executions related to the WDT result in no operation.

If the clock source of WDT chooses the internal WDT

oscillator, the time-out period may vary with tempera-

ture, VDD, and process variations. On the other hand,

if the clock source selects the instruction clock and the

²HALT² instruction is executed, WDT may stop count-

ing and lose its protecting purpose, and the logic can

only be restarted by external logic.

When the device operates in a noisy environment, using

the on-chip RC oscillator (WDT OSC) is strongly recom-

mended, since the HALT can cease the system clock.

C r y s t a l O s c i l l a t o r

R C O s c i l l a t o r

O S C 1

O S C 2

O S C 1

O S C 2

System oscillator

O S C 3

O S C 4

3 2 7 6 8 H z

RTC oscillator

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