STM32F101C6U6 datasheet(19/87 Pages) STMICROELECTRONICS

19 / 87 page

DocID15058 Rev 6

19/87

STM32F101x4, STM32F101x6

Description

output compare, PWM or one pulse mode output. This gives up to 12 input captures / output

compares / PWMs on the largest packages.

The general-purpose timers can work together via the Timer Link feature for synchronization

or event chaining. Their counter can be frozen in debug mode. Any of the general-purpose

timers can be used to generate PWM outputs. They all have independent DMA request

generation.

These timers are capable of handling quadrature (incremental) encoder signals and the

digital outputs from 1 to 3 hall-effect sensors.

2.3.19

I²C bus

The I²C bus interface can operate in multimaster and slave modes. It can support standard

and fast modes.

It supports dual slave addressing (7-bit only) and both 7/10-bit addressing in master mode.

A hardware CRC generation/verification is embedded.

The interface can be served by DMA and it supports SM Bus 2.0/PM Bus.

2.3.20

Universal synchronous/asynchronous receiver transmitter (USART)

The available USART interfaces communicate at up to 2.25 Mbit/s. They provide hardware

management of the CTS and RTS signals, support IrDA SIR ENDEC, are ISO 7816

compliant and have LIN Master/Slave capability.

The USART interfaces can be served by the DMA controller.

2.3.21

Serial peripheral interface (SPI)

The SPI interface is able to communicate up to 18 Mbit/s in slave and master modes in full-

duplex and simplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC

generation/verification supports basic SD Card/MMC modes.

The SPI interface can be served by the DMA controller.

2.3.22

GPIOs (general-purpose inputs/outputs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as

input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the

GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current-

capable.

The I/Os alternate function configuration can be locked if needed following a specific

sequence in order to avoid spurious writing to the I/Os registers.

2.3.23

ADC (analog to digital converter)

The 12-bit analog to digital converter has up to 16 external channels and performs

conversions in single-shot or scan modes. In scan mode, automatic conversion is performed

on a selected group of analog inputs.

The ADC can be served by the DMA controller.

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