M95256 datasheet(21/43 Pages) STMICROELECTRONICS

номер детали	M95256

подробное описание детали	256 Kbit serial SPI bus EEPROM with high-speed clock

PDF	43 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

Logo

21 / 43 page

M95256, M95256-W, M95256-R

Instructions

21/43

5.5

Read from Memory Array (READ)

As shown in Figure 9, to send this instruction to the device, Chip Select (S) is first driven low.

The bits of the instruction byte and address bytes are then shifted in, on Serial Data input

(D). The address is loaded into an internal address register, and the byte of data at that

address is shifted out, on Serial Data output (Q).

If Chip Select (S) continues to be driven low, the internal address register is automatically

incremented, and the byte of data at the new address is shifted out.

When the highest address is reached, the address counter rolls over to zero, allowing the

Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a

single READ instruction.

The Read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip

Select (S) signal can occur at any time during the cycle.

The first byte addressed can be any byte within any page.

The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.

Figure 9.

Read from Memory Array (READ) sequence

The most significant address bit (b15) is Don’t Care.

AI01793D

3456789 10

20 21 22 23 24 25 26 27

14 13

3210

28 29 30

76543

High Impedance

Data Out 1

Instruction

16-Bit Address

MSB

Data Out 2

M95256 датащи(PDF) 21 Page - STMicroelectronics