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M25P80-VMP6TP датащи(PDF) 20 Page - Numonyx B.V

номер детали M25P80-VMP6TP
подробное описание детали  8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface
PDF  52 Pages
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производитель  NUMONYX [Numonyx B.V]
домашняя страница  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M25P80-VMP6TP датащи(HTML) 20 Page - Numonyx B.V

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Instructions
M25P80
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Figure 7.
Write Enable (WREN) instruction sequence
6.2
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 8) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
●
Power-up
●
Write Disable (WRDI) instruction completion
●
Write Status Register (WRSR) instruction completion
●
Page Program (PP) instruction completion
●
Sector Erase (SE) instruction completion
●
Bulk Erase (BE) instruction completion
Figure 8.
Write Disable (WRDI) instruction sequence
C
D
AI02281E
S
Q
2
1
34567
High Impedance
0
Instruction
C
D
AI03750D
S
Q
2
1
34567
High Impedance
0
Instruction



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