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STA328 датащи(PDF) 16 Page - STMicroelectronics

номер детали STA328
подробное описание детали  2.1 HIGH EFFICIENCY DIGITAL AUDIO SYSTEM
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производитель  STMICROELECTRONICS [STMicroelectronics]
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STA328 датащи(HTML) 16 Page - STMicroelectronics

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Figure 13.
7.3.1
Delay Serial Clock Enable
7.3.2
Channel Input Mapping
Each channel received via I2S can be mapped to any internal processing channel via the Channel Input
Mapping registers. This allows for flexibility in processing. The default settings of these registers map
each I2S input channel to its corresponding processing channel.
7.4 CONFIGURATION REGISTER C (Address 02h)
7.4.1
DDX® Power Output Mode
The DDX® Power Output Mode selects how the DDX® output timing is configured. Different power de-
vices can use different output modes. The DDX-2060/2100/2160 recommended use is OM = 10. When
OM=11 the CSZ bits determine the size of the DDX® compensating pulse.
BIT
R/W
RST
NAME
DESCRIPTION
5
R/W
0
DSCKE
Delay Serial Clock Enable:
0 – No serial clock delay
1 – Serial clock delay by 1 core clock cycle to tolerate
anomalies in some I2S master devices
BIT
R/W
RST
NAME
DESCRIPTION
6R/W
0
C1IM
0 – Processing channel 1 receives Left I2S Input
1 – Processing channel 1 receives Right I2S Input
7R/W
1
C2IM
0 – Processing channel 2 receives Left I2S Input
1 – Processing channel 2 receives Right I2S Input
D7
D6
D5
D4
D3
D2
D1
D0
CSZ4
CSZ3
CSZ2
CSZ1
CSZ0
OM1
OM0
10
000
1
0
BIT
R/W
RST
NAME
DESCRIPTION
1...0
R/W
10
OM (1...0)
DDX Power Output Mode:
Selects configuration of DDX® output.
BICKI
T0
T1
LRCKI
T2
T3
SDI
T4
T5



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