AD1934 datasheet(13/28 Pages) AD

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AD1934

Rev. 0 | Page 13 of 28

SERIAL CONTROL PORT

The AD1934 has an SPI control port that permits programming

and reading back of the internal control registers for the DACs

and clock system. There is also a standalone mode available for

operation without serial control that is configured at reset using

the serial control pins. All registers are set to default, except the

internal MCLK enable which is set to 1. Standalone mode only

supports stereo mode with I2S data format and 256 fS master

clock rate. Table 11 shows the SPI control port pins logic state

when configured in standalone and SPI software control mode.

All four SPI control port pins need to be set to logic low for

standalone operation (see Table 11).It is recommended to use a

weak pull-up resistor on CLATCH in applications that have a

microcontroller. This pull-up resistor ensures that the AD1934

recognizes the presence of a microcontroller.

The SPI control port of the AD1934 is a 4-wire serial control

port. The format is similar to the Motorola SPI format except

the input data-word is 24 bits wide. The serial bit clock and

latch can be completely asynchronous to the sample rate of the

DACs. Figure 9 shows the format of the SPI signal. The first

byte is a global address with a read/write bit. For the AD1934,

the address is 0x04, shifted left 1 bit due to the R/W bit. The

second byte is the AD1934 register address and the third byte

is the data.

Table 11. SPI vs. Standalone Mode Configuration

Codec Control

COUT

CIN

CLATCH

CCLK

SPI

OUT

1 (Pull-Up)

Standalone

D22

D23

CLATCH

CCLK

CIN

COUT

tCCH tCCL

tCDS tCDH

tCLS

tCCP

tCLH

tCOTS

tCOD

tCOE

Figure 9. Format of SPI Signal

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