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AD7352 датащи(PDF) 9 Page - Analog Devices

номер детали AD7352
подробное описание детали  Differential Input,Dual,Simultaneous Sampling, 4.25 MSPS, 14-Bit, SAR ADC
PDF  17 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD7352 датащи(HTML) 9 Page - Analog Devices

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Preliminary Technical Data
AD7357
Rev. PrD | Page 9 of 17
TERMINOLOGY
Integral Nonlinearity (INL)
The maximum deviation from a straight line passing through
the endpoints of the ADC transfer function. The endpoints of
the transfer function are zero scale, 1 LSB below the first code
transition, and full scale, 1 LSB above the last code transition.
Differential Nonlinearity (DNL)
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
The deviation of the first code transition (00 . . .000) to (00 . . .
001) from the ideal (that is, -VREF + 0.5 LSB).
Offset Error Match
This is the difference in offset error between the two ADCs.
Gain Error
The deviation of the last code transition (111 . . .110) to (111 . . .
111) from the ideal (that is, VREF – 1.5 LSB) after the offset error
has been adjusted out.
Gain Error Match
The difference in gain error between the two ADCs.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale sine wave signal to one of the two channels and applying a
50 kHz signal to the other channel. The channel-to-channel
isolation is defined as the ratio of the power of the 50 kHz
signal on the converted channel to the power of the noise signal
on the other channel that appears in the FFT of this channel.
The noise frequency on the unselected channel varies from
40 kHz to 740 kHz. The noise amplitude is at 2 × VREF, while the
signal amplitude is at 1 × VREF. See Figure 6.
Power Supply Rejection Ratio (PSRR)
PSRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the ADC VDD supply of frequency fS. The frequency
of the input varies from 1 kHz to 1 MHz.
PSRR (dB) = 10log(Pf/PfS)
where:
Pf is the power at frequency f in the ADC output.
PfS is the power at frequency fS in the ADC output.
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the common-mode voltage of VIN+ and VIN− of
frequency fS as
CMRR (dB) = 10log (Pf/PfS)
where:
Pf is the power at frequency f in the ADC output.
PfS is the power at frequency fS in the ADC output.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns to track mode at the end
of conversion. The track-and-hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within ±1/2 LSB, after the end of conversion.
Signal-to-(Noise + Distortion) Ratio (SINAD)
This is the measured ratio of signal-to-noise and distortion at
the output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals up
to half the sampling frequency (fS/2), excluding dc. The ratio is
dependent on the number of quantization levels in the
digitization process; the more levels, the smaller the
quantization noise.
The theoretical signal-to-noise and distortion ratio for an ideal
N-bit converter with a sine wave input is given by
SINAD = (6.02 N + 1.76) dB
Thus, for a 12-bit converter, this is 74 dB and for a 14 bit
converter, this is 86dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the
fundamental. For the AD7356, it is defined as
()
1
6
5
4
3
2
V
V
V
V
V
V
THD
2
2
2
2
2
20log
dB
+
+
+
+
=
where:
V1 is the rms amplitude of the fundamental.
V2, V3, V4, V5, and V6 are the rms amplitudes of the second
through the sixth harmonics.



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