DS1689/DS1693

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Extended Control Register 4B

MSB

LSB

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

ABE

E32K

CS

RCE

PRS

RIE

WIE

KSE

extended functions.

Bit 6: E32K (Enable 32.768kHz Output). This bit, when written to logic 1, enables the 32,768Hz

oscillator frequency to be output on the SQW pin provided SQWE = 1.

Bit 5: CS (Crystal Select). When CS is set to 0, the oscillator is configured for operation with a crystal

that has a 6pF specified load capacitance. When CS = 1, the oscillator is configured for a 12.5pF crystal.

Bit 4: RCE (RAM Clear Enable). When set to a 1, this bit enables a low level on pin 4 (

RCLR) to clear

all 114 bytes of user RAM. When RCE = 0, the RAM clear function is disabled.

Bit 3: PRS (PAB Reset Select). When set to 0 the

PWR pin is set high impedance when the DS1689

goes into power-fail. When set to 1, the

PWR pin remains active upon entering power-fail.

Bit 2: RIE (RAM Clear Interrupt Enable). When RIE is set to 1, the

IRQ pin is driven low when a

RAM clear function is completed.

PWR pin is driven active low when a wake-up condition occurs, causing the WF bit to be set to 1. When

and

PWR are driven low in response to WF being set to 1. When WIE is cleared to 0, the WF bit has no

effect on the

PWR or IRQ pins.

is driven active low when a kickstart condition occurs (

KS pulsed low), causing the KF bit to be set to 1.

applied, both

IRQ and PWR are driven low in response to KF being set to 1. When KSE is cleared to 0,

the KF bit has no effect on the

PWR or IRQ pins.