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CY2SSTV855
Document #: 38-07459 Rev. *F
Page 7 of 7
Document History Page
Document Title: CY2SSTV855 Differential Clock Buffer/Driver
Document #: 38-07459
REV.
ECN NO.
Issue Date
Orig. of
Change
Description of Change
**
117544
09/09/02
HWT
New data sheet
*A
122934
12/18/02
RBI
Add power up requirements to maximum ratings information
*B
124087
04/23/03
RGL
Changed the package drawing and dimension from Z28 to Z29
Corrected the block diagram
Changed the Output Enable/Disable time from 3/3 to 30/10 ns
Eliminated Dynamic Phase Offset spec.
Changed the Phase Error Jitter spec. from ±50 to ±150 ps
*C
215389
See ECN
RGL
Added an Industrial Grade Devices (temp from –40°C to 85).
*D
224444
See ECN
RGL
Removed “PRELIMINARY”
*E
401500
See ECN
RGL
Added Lead Free Devices
*F
436956
See ECN
RGL
Changed the static and dynamic offset numbers
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