PL133-97

DS20007036A-page 6

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2025 Microchip Technology Inc. and its subsidiaries

3.0

NOMINAL PERFORMANCE CHARACTERISTICS

U

FIGURE 3-1:

PL133-97 Additive Phase Jitter: VDD = 3.3V, CLK-100 MHz, Integration Range 12 kHz

to 20 MHz.

When a buffer is used to pass a signal, the buffer will add a little bit of its own noise. The phase noise on the output of

the buffer will be a little bit more than the phase noise in the input signal. The noise added by the buffer to the input

signal is quantified by the additive phase jitter defined by the following formula:

EQUATION 3-1:

Note:

The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

PLA133-97

AdditivePhaseJitter

OutputPhaseJitter



2

InputPhaseJitter



2

–

=