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LAN8814D/ZMX датащи(PDF) 21 Page - Microchip Technology

номер детали LAN8814D/ZMX
подробное описание детали  4-Port Gigabit Ethernet Transceiver with QSGMII
PDF  112 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8814D/ZMX датащи(HTML) 21 Page - Microchip Technology

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LAN8814D
© 2026 Microchip Technology Inc. and its subsidiaries
DS00003592K-page 21
TABLE 3-8:
CONFIGURATION STRAP INPUT PINS
Name
Symbol
Buffer
Type
Description
PHY Base
Address
Configuration
Straps
PHYAD[4:0]
VIS
Configures the PHY Management base address, used with
MDIO bus transactions. The PHY base address, PHYAD[4:0],
is sampled and latched at power-up/reset and is configurable
to any value from 0 to 1Fh. Each PHY address bit is configured
as follows:
Pulled-up = 1
Pulled-down = 0
The addresses of each of the 4 PHYs are the base value, as
defined by PHYAD[4:0], plus offsets of 0, 1, 2 and 3. Refer to
Section 3.3.2, "PHY Address (PHYAD[4:0])" for additional
information.
Note:
PHYAD[4:0] must never be greater than ‘h1C.
LED Polarity
Configuration
Straps
PORT0_LED1_POL
PORT0_LED2_POL
PORT1_LED1_POL
PORT1_LED2_POL
PORT2_LED1_POL
PORT2_LED2_POL
PORT3_LED1_POL
PORT3_LED2_POL
VIS
Configures LED polarity as Active High or Active Low. Since
the LED pins are shared with configuration straps, the default
polarity of the LED pins is determined during strap loading.
If the strap value on a pin is a 0, the LED is set as active high
(PORTx_LEDy_POL = 1), since it is assumed that a LED to
ground is used as the pull-down.
Note:
When using a LED as a pull-down strap, an exter-
nal supplemental pull-down resistor may be
needed to ensure a valid low level.
If the strap value on a pin is 1, the LED is set as active low
(PORTx_LEDy_POL = 0), since it is assumed that a LED to
VDDIO is used as the pull-up.
Refer to Section 3.3.5, "LED Polarity
(PORT[3:0]_LED[2:1]_POL)" for additional information.
Device Mode
Configuration
Straps
MODE_SEL[4:0]
VIS
Configures the specific functional mode of all PHYs. The
MODE[4:0] configuration straps are sampled and latched at
power-up/reset and are defined in Section 3.3.1, "Device Mode
Select (MODE_SEL[4:0])".
PHY Broadcast
Mode
Configuration
Strap
ALLPHYAD
VIS
Configures the default support for PHY Broadcast access
using PHY Address 0. The ALLPHYAD configuration strap is
sampled and latched at power-up/reset and are defined as fol-
lows:
0: Enable PHY Broadcast accesses by default
1: Disable PHY Broadcast accesses by default
Refer to Section 3.3.3, "All PHYs Address (ALLPHYAD)" for
additional information.
LED Mode
Configuration
Strap
LED_MODE
VIS
Configures the device’s LED behavior as Individual or Tri-
Color. All 8 LEDs are configured with identical behavior. The
LED_MODE configuration strap is sampled and latched at
power-up/reset and is defined as follows:
0: Tri-color-LED mode
1: Individual-LED mode
Refer to Section 3.3.4, "LED Mode Select (LED_MODE)" for
additional information.



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