L6910ATR datasheet(10/21 Pages) STMICROELECTRONICS

10 / 21 page

L6910A L6910

10/21

Figure 7. Compensation Network

The compensation network consists in the internal error amplifier and the impedance networks ZIN (R3, R4 and

C20) and ZFB (R5, C18 and C19). The compensation network has to provide a closed loop transfer function with

the highest 0dB crossing frequency to have fast response (but always lower than fsw/10) and the highest gain

in DC conditions to minimize the load regulation.

A stable control loop has a gain crossing with -20dB/decade slope and a phase margin greater than 45°. Include

worst-case component variations when determining phase margin.

To locate poles and zeroes of the compensation networks, the following suggestions may be used:

Modulator singularity frequencies:

Compensation network singularity frequency:

– Put the gain R5/R3 in order to obtain the desired converter bandwidth;

–Place

ωZ1 before the output filter resonance ωLC;

–Place

ωZ2 at the output filter resonance ωLC;

–Place

ωP1 at the output capacitor ESR zero ωESR;

–Place

ωP2 at one half of the switching frequency;

– Check the loop gain considering the error amplifier open loop gain.

Vin

ESR

Cout

C19

EAREF

Vcomp

PWM

Comparator

Vout

∆Vosc

C18

C20

OUT

⋅

---------------------------

ESR

ESR C

OUT

⋅

---------------------------------

C18 C19

⋅

C18

C 19

-----------------------------





⋅

-----------------------------------------------

R4 C 20

⋅

------------------------

R5 C19

⋅

------------------------

R 4

() C20

⋅

-------------------------------------------

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