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DFAULT; in the "Application ideas" section, another simple circuit is showed to guarantee the same pro-

tection without the SCR.

– Dmon input undervoltage: when an undervoltage on Dmon is detected, MFAULT is put high, Cout is

pulled low (an internal OCP_BOUNCE signal is generated, see fig. 19) and PW_OK falls down. This

function is enabled 64ms after the UVLO signal falls down. Debounce logic is implemented so that

MFAULT and OCP_BOUNCE signals are generated only if the undervoltage condition lasts more than

500µs.

The Dmon UV and OV protections can be set to work with thresholds set for 5V or 3.3V output voltage:

the choice depends on the IC programming.

Figure 20. Fault timing diagram

5

AC SENSE (MAINS UNDERVOLTAGE WARNING)

The device monitors the primary bulk voltage and warns the system when the power is about to be lost pulling

down the PW_OK output.

The ACsns pin is typically connected to one of the windings of the main transformer (see fig. 21). Through a

to clamp voltage spikes present.

The fault signal is generated by means of AC_GOOD, the output of an internal comparator; this comparator is

internally referred to a trimmable 2.5V reference and indicates an AC fault if the voltage applied at its externally

available (non-inverting) input is below the internal reference, as shown in fig. 21.

This comparator is provided with current hysteresis instead of a more usual voltage hysteresis: an internal 50µA

current generator is ON if the voltage is below 2.5V and is turned off when the voltage applied at the non-invert-

ing input exceeds 2.5V.

This approach provides an additional degree of freedom: it is possible to set the ON threshold and the OFF

Mfault

Mfault

POK

POK

Dfault current

Cout

Output

Mfault

POK

Main output’s overvoltage

Output

Mfault

POK

Main output’s undervoltage

Auxiliary output’s overvoltage

Auxiliary output’s undervoltage

(*) Dmon is connected to the Auxiliary output Rail