LTC1069-6

8

Rev. B

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supply voltage (see Table 3). The clock feedthrough spec-

ifications are not part of the wideband noise.

Table 3. Wideband Noise

VS

WIDEBAND NOISE

3.3V

118µVRMS

5V

123µVRMS

±5V

127µVRMS

Aliasing

Aliasing is an inherent phenomenon of sampled data

systems and occurs for input frequencies approaching

the sampling frequency. The internal sampling frequency

of the LTC1069-6 is 100 times its cutoff frequency. For

instance, if a 98.5kHz, 100mVRMS signal is applied at the

APPLICATIONS INFORMATION

PACKAGE DESCRIPTION

input of an LTC1069-6 operating with a 50kHz clock, a

1.5kHz, 484µVRMS alias signal will appear at the filter out-

put. Table 4 shows details.

Table 4. Aliasing (fCLK = 50kHz)

INPUT FREQUENCY

(VIN = 1VRMS)

(kHz)

OUTPUT LEVEL

(Relative to Input)

(dB)

OUTPUT FREQUENCY

(Aliased Frequency)

(kHz)

fCLK/fC = 50:1, fCUTOFF = 1kHz

96 (or 104)

–78.3

4.0

97 (or 103)

–70.4

3.0

98 (or 102)

–80.6

2.0

98.5 (or 101.5)

–46.3

1.5

99 (or 101)

–2.8

1.0

99.5 (or 100.5)

–1.38

0.5

.016 – .050

(0.406 – 1.270)

.010 – .020

(0.254 – 0.508)

× 45°

0

°– 8° TYP

.008 – .010

(0.203 – 0.254)

SO8 REV G 0212

.053 – .069

(1.346 – 1.752)

.014 – .019

(0.355 – 0.483)

TYP

.004 – .010

(0.101 – 0.254)

.050

(1.270)

BSC

1

2

3

4

.150 – .157

(3.810 – 3.988)

NOTE 3

8

7

6

5

.189 – .197

(4.801 – 5.004)

NOTE 3

.228 – .244

(5.791 – 6.197)

.245

MIN

.160

±.005

RECOMMENDED SOLDER PAD LAYOUT

.045

±.005

.050 BSC

.030

±.005

TYP

INCHES

(MILLIMETERS)

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610 Rev G)