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AD549

Rev. H | Page 13 of 20

AD549

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DIFFERENTIAL INPUT VOLTAGE OVERLOAD

A plot of the AD549 input currents vs. differential input

voltage (defined as VIN+ − VIN−) appears in Figure 36. The

input current at either terminal stays below a few hundred

femtoamps until one input terminal is forced higher than 1 V

to 1.5 V above the other terminal. Under these conditions, the

input current limits at 30 μA.

Figure 38. Follower with Input Current Limit

Figure 39 is a schematic of the AD549 as an inverter with an

input voltage clamp. Bootstrapping the clamp diodes at the

inverting input minimizes the voltage across the clamps and

keeps the leakage due to the diodes low. Use low leakage diodes,

such as the FD333s, and shield them from light to prevent photo-

currents from being generated. Even with these precautions, the

diodes measurably increase input current and capacitance.

100µ

10µ

1µ

100n

10n

100p

10p

100f

10f

–5

–4

–3

–2

–1

DIFFERENTIAL INPUT VOLTAGE (V) (VIN+ – VIN–)

IIN–IIN+

AD549

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DIODES

Figure 39. Input Voltage Clamp with Diodes

SAMPLE-AND-DIFFERENCE CIRCUIT TO MEASURE

ELECTROMETER LEAKAGE CURRENTS

Figure 36. Input Current vs. Differential Input Voltage

INPUT PROTECTION

There are a number of methods used to test electrometer leakage

currents, including current integration and direct I-to-V con-

version. Regardless of the method used, board and interconnect

cleanliness, proper choice of insulating materials (such as Teflon

or Kel-F), correct guarding and shielding techniques, and care

in physical layout are essential to making accurate leakage

measurements.

The AD549 safely handles any input voltage within the supply

voltage range. Subjecting the input terminals to voltages beyond

the power supply can destroy the device or cause shifts in input

current or offset voltage if the amplifier is not protected.

A protection scheme for the amplifier as an inverter is shown

in Figure 37. RP is chosen to limit the current through the

inverting input to 1 mA for expected transient (less than 1 sec)

overvoltage conditions, or to 100 μA for a continuous overload.

Because RP is inside the feedback loop and is much lower in

value than the amplifier input resistance, it does not affect the

dc gain of the inverter. However, the Johnson noise of the

resistor adds root sum of squares to the amplifier input noise.

Figure 40 is a schematic of the sample-and-difference circuit. It

uses two AD549 electrometer amplifiers (A and B) as I-to-V

converters with high value (1010 Ω) sense resistors (RSa and

RSb). R1 and R2 provide for an overall circuit sensitivity of

10 fA/mV (10 pA full scale). CC and CF provide noise suppression

and loop compensation. CC should be a low leakage polystyrene

capacitor. An ultralow leakage Kel-F test socket is used for con-

tacting the device under test. Rigid Teflon coaxial cable is used

to make connections to all high impedance nodes. The use of

rigid coaxial cable affords immunity to error induced by mechan-

ical vibration and provides an outer conductor for shielding. The

entire circuit is enclosed in a grounded metal box.

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Figure 37. Inverter with Input Current Limit

In the corresponding version of this scheme for a follower,

shown in Figure 38, RP and the capacitance at the positive input

terminal produce a pole in the signal frequency response at a

f = ½πRC. Again, the Johnson noise, RP, adds to the input

voltage noise of the amplifier.

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