FTG for Intel Pentium 4 CPU and Chipsets

CY28344

Rev 1.0, November 21, 2006

Page 1 of 21

2200 Laurelwood Road, Santa Clara, CA 95054

Tel:(408) 855-0555

Fax:(408) 855-0550

www.SpectraLinear.com

Features

Synthesizer/Driver Specifications

• System frequency synthesizer for Intel Brookdale (845)

and Brookdale G Pentium® 4 Chipsets

• Programmable clock output frequency with less than

1MHz increment

• Integrated fail-safe Watchdog timer for system

recovery

• Automatically switch to HW-selected or

SW-programmed clock frequency when Watchdog

timer time-out

• Capable of generating system RESET after a Watchdog

timer time-out occurs or a change in output frequency

via SMBus interface

• Support SMBus byte Read/Write and block Read/Write

operations to simplify system BIOS development

• Vendor ID and Revision ID support

• Programmable drive strength support

• Programmable output skew support

• Power management control inputs

• Available in 48-pin SSOP

CPU

3V66

PCI

REF

48M

×3

×4

×9

×1

×2

Block Diagram

VDD_REF

CPU0:2, CPU0:2#,

XTAL

PLL Ref Freq

X2

X1

VDD_PCI

OSC

SCLK

PLL 1

SMBus

Logic

VDD_48MHz

SDATA

VDD_3V66

Divider

Network

VDD_CPU

PLL2

FS0:4

2

VTTPWRGD/PD#

REF_2X

VDD_REF

X1

X2

GND_REF

^FS0/PCI_F0

^FS1/PCI_F1

VDD_PCI

GND_PCI

PCI0

PCI1

PCI2

PCI3

VDD_PCI

GND_PCI

PCI4

PCI5

PCI6

VDD_3V66

GND_3V66

3V66_1

3V66_2

3V66_3

RST#

VDD_CORE

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

28

27

26

25

32

31

30

29

REF_2X/FS2^

CPU0

CPU0#

VDD_CPU

CPU1

CPU1#

GND_CPU

VDD_CPU

CPU2

CPU2#

MULTSEL0

IREF

GND_CPU

48MHz/FS3^

24_48MHz

VDD_48MHz

GND_48MHz

3V66_0/VCH_CLK/FS4^

VDD_3V66

GND_3V66

SCLK

SDATA

VTTPWRGD/PD#*

GND_CORE

MULTSEL0

3V66_1:3

PCI_F0:1

PCI0:6

48MHz

24_48MHz

RST#

Note:

1. Signals marked with “*” and “^,” respectively, have internal pull-up and

pull-down resistors.

VDD_3V66

3V66_0/VCH_CLK

SSOP-48