Choose a small range of P so that the VCO frequency is swept between 45 and 55MHz (or 60-80MHz if VCOFAST is used).

Remembering that the P divider can divide by half integers. So for P = 4.0

→ 7.0 sweep the M inputs from 2.5 → 24. The most

accurate N and N_MOD can be calculated by:

N = FLOOR(((Fout/Fin)*(P*M)),1)

N_MOD = ROUND(32*((((Fout)/Fin)*(P*M)-N),0)

This shows that settingM=11.5,N=75 N_MOD = 47 P = 7 gives a comparison frequency of just over 1MHz, a VCO frequency

of just under 80MHz (so VCO_FAST must be set) and an output frequency of 11.289596 which gives a sample rate of

44.099985443kHz, or accurate to 0.33 ppm.

Care must be taken when synchronization of isochronous data is not possible, i.e. when the PLL has to be used in the above

mode. The I2S should be master on the LM4934 so that the data source can support appropriate SRC as required. This method

should only be used with data being read on demand to eliminate sample rate mismatch problems.

Where a system clock exists at an integer multiple of the required DAC clock rate it is preferable to use this rather than the PLL.

The LM4934 is designed to work in 8,12,16,24,32, and 48kHz modes from a 12MHz clock without the use of the PLL. This saves

power and reduces clock jitter.

Clock Configuration Register

This register is used to control the multiplexers and clock R divider in the clock module.

CLOCK (09h) (Set = logic 1, Clear = logic 0)

Bits

Register

Description

0

FAST_CLOCK

If set master clock is divided by two.

FAST_CLOCK

MCLK Frequency

0

Normal

1

Divided by 2

1

PLL_INPUT

Programs the PLL input multiplexer to select:

PLL_INPUT

PLL Input Source

0

MCLK

1

I2S Input Clock

2

AUDIO_CLK_SEL

Selects which clock is passed to the audio sub-system

DAC_CLK_SEL

DAC Sub-system

Input Source

0

PLL Input

1

PLL Output

3

PLL_ENABLE

If set enables the PLL. (MODES 4–7 only)

7:4

R_DIV

Programs the R divider

R_DIV

Divide Value

0000

1

0001

1

0010

1.5

0011

2

0100

2.5

0101

3

0110

3.5

0111

4

1000

4.5

1001

5

1010

5.5

1011

6

1100

6.5

1101

7

1110

7.5

1111

8

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