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MP8007 датащи(PDF) 17 Page - Monolithic Power Systems |
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MP8007 датащи(HTML) 17 Page - Monolithic Power Systems |
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17 / 27 page ![]() MP8007 ― IEEE 802.3AF PD WITH 13W FLYBACK / BUCK CONVERTER MP8007 Rev.1.0 www.MonolithicPower.com 17 6/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. buck mode, and do not place a resistor between MODE and GND in flyback mode. Converter Switching Work Principle After startup, DCDC converter works in discontinuous conduction mode (DCM). The second switching cycle will not start until the inductor current drops to 0A. In each cycle, the internal MOSFET is turned on, and the current- sense circuit senses the current IP(t) internally. Use Equation (2) to calculate the rate at which the current rises linearly in flyback mode: p(t) IN M dI V dt L (2) When IP(t) rises up to IPK, the internal MOSFET turns off (see Figure 5). The energy stored in the primary-side inductance transfers to the secondary-side through the transformer. Figure 5—Primary-side current waveform The primary-side inductance (LM) stores energy in each cycle as a function of Equation (3): 2 MPK 1 EL I 2 (3) Calculate the power transferred from the input to the output with Equation (4): 2 MPK S 1 PL I F 2 (4) Where FS is the switching frequency. When IPK is constant, the output power depends on FS and LM. Use Equation (5) to calculate the rate at which the current rises linearly in buck mode: p(t) IN OUT M dI VV dt L (5) The internal MOSFET turns off when IP(t) rises to IPK (see Figure 6). The output current is calculated with Equation (6): OUT PK 1 IDI 2 (6) Where, D is the inductor current conducting duty cycle. Figure 6—Inductor current waveform Converter Light-Load Control In flyback mode (if the load decreases), DCDC converter stretches down the frequency automatically to reduce the power transferring while keeping the same IPK in each cycle. An approximate 10 kHz minimum frequency is applied to detect the output voltage even at a very light load. During this condition, the switching IPK jumps between 20 percent of the normal IPK and 100 percent of the normal IPK to reduce the power transferring. The DCDC converter still transfers some energy to the output even if there is no load on the output due to the 10 kHz minimum frequency. This means that some load is required to keep the output voltage in regulation, or else VOUT will rise and trigger OVP. In buck mode, the DCDC converter has no minimum frequency limit, so it stretches down to a very low frequency and regulates the output automatically even there is no load on the output. Frequency Control By monitoring the auxiliary winding voltage in flyback mode or monitoring the SW voltage in buck mode, the DCDC converter detects and regulates the inductor current in DCM. The frequency is controlled by the peak current, the current ramp slew rate, and the load current. The maximum frequency occurs when the DCDC converter runs in critical conduction mode, providing the maximum load power. The DCDC converter switching frequency should be lower than 200 kHz in the design. |
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