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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST7735SV датащи(PDF) 39 Page - Sitronix Technology Co., Ltd. |
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ST7735SV датащи(HTML) 39 Page - Sitronix Technology Co., Ltd. |
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39 / 201 page  ST7735SV V 1.3 Page 39 of 201 2020-01 9.2.1 Write Cycle Sequence The write cycle means that the host writes information (command or/and data) to the display via the interface. Each write cycle (WRX high-low-high sequence) consists of 3 control signals (D/CX, RDX, WRX) and data signals (D[17:0]). D/CX bit is a control signal, which tells if the data is a command or a data. The data signals are the command if the control signal is low (=’0’) and vice versa it is data (=’1’). WRX D[17:0] The host starts to control D[17:0] lines when there is a falling edge of the WRX. The display writes D[17:0] lines when there is a rising edge of WRX. The host stops to control D[17:0] lines. Figure 8 8080-series WRX Protocol Note: WRX is an unsynchronized signal (It can be stopped). CMD CMD PA1 CMD PA1 PAN-2 PAN-1 S P CMD CMD PA1 CMD PA1 PAN-2 PAN-1 S P CMD CMD PA1 CMD PA1 PAN-2 PAN-1 S P D[17:0] RESX CSX D/CX RDX WRX D[17:0] Host D[17:0] Host to LCD Driver D[17:0] LCD to Host “ 1” “ 1” Hi-Z 1-byte command 2-byte command N-byte command CMD: write command code PA: parameter or display data Signals on D[17:0], D/CX, R/WX, E pins during CSX=1 are ignored. Figure 9 8080-series Parallel Bus Protocol, Write to Register or Display RAM |
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