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L4936NH датащи(PDF) 7 Page - STMicroelectronics |
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L4936NH датащи(HTML) 7 Page - STMicroelectronics |
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7 / 11 page ![]() RESET CIRCUIT The block circuit diagram of the reset circuit is shown in fig.4. The reset circuit supervisesthe standby out- put voltage. The reset threshold of 4.7V is defined by the internal reference voltage and the standby output divider. The reset pulse delay time tRD, is defined by the charge time of an external capacitor CT : CT x2V tRD = 2 µA The reaction time of the reset circuit dependson the discharge time limitation of the reset capacitor CT and is proportional to the value of CT. The reaction time of the reset circuit increases the noise immunity. In fact, if the standbyoutput voltage drops below the reset threshold for a time shorter than the reaction time tRR, no reset output variation occurs. The nominal reset delay is generated for standby output voltage drops longer than the time necessary for the complete discharging of the ca- pacitor CT. This time is typically equal to 50 µsif CT = 100nF.The typical resetoutputwaveforms are shown in fig. 5. SENSE COMPARATOR This circuit compares an input signal with an internal voltage reference of typically 1.23V. The use of an external voltage divider makes the comparator very flexible in the application.This function can be used to supervisethe input voltage - either before or after the protection diode- andto give additionalinforma- tion to the microprocessor such as lowvoltage warn- ings. Figure 4 :Block Diagram of the Reset Circuit. L4936N/NH 7/11 |
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