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TH8065 датащи(PDF) 21 Page - Melexis Microelectronic Systems

номер детали TH8065
подробное описание детали  Voltage Regulator with LIN Transceiver and Watchdog
PDF  40 Pages
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производитель  MELEXIS [Melexis Microelectronic Systems]
домашняя страница  http://www.melexis.com
Logo MELEXIS - Melexis Microelectronic Systems

TH8065 датащи(HTML) 21 Page - Melexis Microelectronic Systems

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TH8065
Voltage Regulator with LIN Transceiver and Watchdog
TH8065 – Datasheet
Page 21 of 40
3901008065
May 2006
Rev 003
3.8 RESET and Watchdog
The TH8065 contains a combined reset- and watchdog-unit which secures the correct initialization and
generation of the reset signal.
VSUP,
VCC
VRES
RESET
trr
tRes
int.
POR
signal
tWDH
tWDL
WDI
CWD VCWDH
VCWDL
Start-up
ON delay
Watchdog
Power-off
Figure 11 - Reset and Watchdog behaviour
The RESET pin outputs the reset state and the watchdog state of the TH8065. The POR timer will be started
if VSUP is switched on and VCC> POR threshold (4.65V). The Watchdog is inactive. After the time tRes the
RESET output is switched from low to high and the watchdog becomes active. The charging of the watchdog
capacity starts and dependent from the trigger pulse on the WDI input the Reset outputs the status of the
watchdog.
The watchdog is only active if VCC > VRES. If VCC drops below VRES the watchdog will be switched off and the
watchdog capacity will be discharged.
3.8.1. RESET
The RESET unit combines a VCC low voltage detection unit with fixed POR timer This output is switched
from low to high if VSUP is switched on and VCC>VRES (4.65V) after the time tRes .
All conditions which cause a drop of the VCC voltage will be detected from the low voltage reset unit which
generates a reset signal. The TH8065 will be reinitialized if the VCC voltage rises above the low voltage limit.
If the voltage VCC drops below VRES then the RESET output is switched from high to low after the time trr has been
reached. For this reason short breaks of the VCC voltage and uncontrolled reset generations will be inhibited.
The circuitry of the RESET output driver guarantees, that the reset low level during decreasing of the VCC
voltage will be secure kept (see Figure 13).



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