OPERATION

The PL0300/P is an ultra-low-noise, low-dropout, low-

quiescent current linear regulator designed for space-

restricted applications. It is available with preset output

voltages ranging from 1.5V to 5.0V in 100mV increments.

It can supply loads of up to 300mA. As shown in the

Block Diagram, the PL0300/P consists of a highly

accurate band gap core, noise bypass circuit, error

amplifier, P-channel pass transistor and an internal

feedback voltage divider. The PL0300/P allows for an

adjustable output with an external feedback network. The

1.0V band gap reference is connected to the error

amplifier’s inverting input. The error amplifier compares

this reference with the feedback voltage and amplifies

the difference. If the feedback voltage is lower than the

reference voltage, the pass transistor gate is pulled low.

This allows more current to pass to the output and

increases the output voltage. If the feedback voltage is

too high, the pass transistor gate is pulled high, allowing

less current to pass to the output. The output voltage is

fed back through an internal resistor voltage-divider

connected to the OUT pin. An external bypass capacitor

connected to BYP (PL0300/P-BYP) reduces the noise at

the output. Additional blocks include a current limiter,

over temperature protection and shutdown logic.

PL0300

Internal P-Channel Pass Transistor

The PL0300/P features a 1

Ω (typical) P-channel MOSFET

pass transistor. This provides several advantages over

similar designs using a PNP pass transistor, including

longer battery life. The P-channel MOSFET requires no

base drive, which considerably reduces the quiescent

current. PNP-based regulators waste considerable current

in dropout when the pass transistor saturates. They also

use high base-drive current under heavy loads.

The PL0300/P does not suffer from these problems and

consumes only 90

μA of quiescent current.

Current Limit

The PL0300/P includes a current limiter. It monitors the

output current and controls the pass transistor’s gate

voltage to limit the output current under 550mA (typical).

The output can be shorted to ground for an indefinite

amount of time without damaging the part.

The short circuit current limit is increased to

approximately 650mA (typical) when the output voltage

is within 10% of the nominal output, thus improving the

performance of large pulsating loads. The in-regulation

current limit option provides the user to overload the

Enable Input

The PL0300/P features an active-high Enable input (EN)

pin that allows on/off control of the regulator. The

PL0300/P bias current reduces to ZERO (leakage current)

when it goes into shutdown. The Enable input is

TTL/CMOS compatible for simple logic interfacing. When

EN is ‘H,’ the output voltage startup rising time is typically

25µs. Connect EN pin to IN pin for normal operation.

Power Good Flag (Applicable for PL0300P)

The PL0300/P features a Power Good flag (PGD), which

monitors the output voltage and signals an error

condition when the output voltage drops 10% below its

nominal value.

Under Voltage Lockout

When the input supply goes too low (typically below

2.0V), the PL0300/P produces an internal UVLO (Under

Voltage Lockout) signal that generates a fault signal and

shuts down the chip. This mechanism protects the chip

from producing false logic due to low input supply.

July 2007

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© 2007 Power IC. All Rights Reserved.

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