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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CC115LRGPR.B датащи(PDF) 72 Page - Texas Instruments |
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CC115LRGPR.B датащи(HTML) 72 Page - Texas Instruments |
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72 / 74 page  www.ti.com EXAMPLE BOARD LAYOUT 16X (0.5) (0.95) (0.95) (R0.05) TYP 0.07 MAX ALL AROUND 0.07 MIN ALL AROUND 20X (0.55) 20X (0.24) (3.85) (3.85) ( 2.4) ( 0.2) TYP VIA VQFN - 1 mm max height RGP0020C PLASTIC QUAD FLATPACK - NO LEAD 4219027/A 03/2025 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X SEE SOLDER MASK DETAIL 1 5 6 10 11 15 16 20 21 METAL EDGE SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS |
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