TUSB7320 datasheet(96/122 Pages) TI2

96 / 122 page

Table 8-158. Port Status and Control Register Description (continued)

BIT

FIELD NAME

ACCESS

DESCRIPTION

WCE(1)

Wake on Connect Enable.

RSVD

Reserved. Return zero when read.

CEC(1)

rc or r

Port Config Error Change. This field is only valid for USB 3.0 protocol

ports. For USB 2.0 protocol ports, this bit is reserved.

PLC(1)

Port Link State Change.

PRC(1)

Port Reset Change.

OCC(1)

Overcurrent Change.

WRC(1)

rc or r

Warm Port Reset Change. This field is only valid for USB 3.0 protocol

ports. For USB 2.0 protocol ports, this bit is reserved.

PEC(1)

Port Enabled/Disabled Change.

CSC(1)

Connect Status Change.

LWS

Port Link State Write Strobe. This bit returns a zero when read.

15:14

PIC(1)

Port Indicator Control. Because the TUSB73X0 does not support port

indicators, this field has no effect.

13:10

PORT_SPEED(1)

Port Speed

PP(1)

Port Power.

8:5

PLS(1)

Port Link State

PR(1)

Port Reset.

OCA

Overcurrent Active.

RSVD

Reserved. Returns zero when read.

PED(1)

Port Enabled/Disabled.

CCS(1)

Current Connect Status.

(1)

This bit is a sticky bit and is reset by a global reset (GRST) or the internally-generated power-on-reset.

8.3.3.10 Port PM Status and Control Register (USB 3.0 Ports)

The TUSB73X0 implements a Port PM Status and Control Register for each port that is implemented. The

number of Port PM Status and Control Registers is the same as the value in the MAX_PORTS field in the Host

Controller Structural Parameters 1 Register (see Host Controller Structural Parameters 1).

Operational Base register offset: 404h + (10h × (n-1))), where n = Port Number

Default value: 0000 0000h

Table 8-159. HC Operational Register (Operational Base + 404h + (10h × (n-1))), where n = Port Number

Bit

No.

Reset

State

Bit

No.

Reset

State

Table 8-160. Port PM Status and Control Register (USB 3.0) Description

BIT

FIELD NAME

ACCESS

DESCRIPTION

31:17

RSVD

Reserved. Returns zeros when read.

FLA

Force Link PM Accept.

15:8

U2_TIMEOUT(1)

U2 Timeout.

TUSB7320, TUSB7340

SLLSE76Q – MARCH 2011 – REVISED MARCH 2024

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