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TPS799 датащи(PDF) 14 Page - Texas Instruments |
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TPS799 датащи(HTML) 14 Page - Texas Instruments |
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14 / 49 page ![]() 8.2.2 Detailed Design Procedure 8.2.2.1 Input and Output Capacitor Requirements Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-μF to 1-μF low ESR capacitor across the input supply near the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if the device is located several inches from the power source. If source impedance is not sufficiently low, a 0.1-μF input capacitor may be necessary to ensure stability. The TPS799 is designed to be stable with standard ceramic capacitors with values of 2.2 μF or greater. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over temperature. Maximum ESR must be less than 1.0 Ω. 8.2.2.2 Output Noise In most LDOs, the band gap is the dominant noise source. If a noise-reduction capacitor (CNR) is used with the TPS799, the band gap does not contribute significantly to noise. Instead, noise is dominated by the output resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01-μF noise reduction capacitor. To further optimize noise, equivalent series resistance of the output capacitor can be set to approximately 0.2 Ω. This configuration maximizes phase margin in the control loop, reducing total output noise by up to 10%. Noise can be referred to the feedback point; with CNR = 0.01 μF total noise is approximately given by Equation 1: V =xV N OUT 10.5 V m RMS V (1) 8.2.2.3 Dropout Voltage The TPS799 uses a PMOS pass transistor to achieve a low dropout voltage. When (VIN – VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and rDS(on) of the PMOS pass element is the input-to-output resistance. Because the PMOS device behaves like a resistor in dropout, VDO approximately scales with the output current. As with any linear regulator, PSRR degrades as (VIN – VOUT) approaches dropout. This effect is illustrated in Figure 6-10 through Figure 6-18 in the Typical Characteristics section. 8.2.2.4 Transient Response As with any regulator, increasing the size of the output capacitor reduces over- and undershoot magnitude, but increases the duration of the transient response. The transient response of the TPS799 is enhanced by an active pulldown device that engages when the output overshoots by approximately 5% or more when the device is enabled. When enabled, the pulldown device behaves like a 350-Ω resistor to ground. 8.2.2.5 Minimum Load The TPS799 is stable with no output load. To meet the specified accuracy, a minimum load of 500 μA is required. With loads less than 500 μA at junction temperatures near 125°C, the output can drift up enough to cause the output pulldown device to turn on. The output pulldown device limits voltage drift to 5% typically; however, ground current can increase by approximately 50 μA. In typical applications, the junction cannot reach high temperatures at light loads because there is no noticeable dissipated power. The specified ground current is then valid at no load in most applications. 8.2.2.6 Feedback Capacitor Requirements (TPS79901 Only) The feedback capacitor, CFB, shown in Figure 8-2 is required for stability. For a parallel combination of R1 and R2 equal to 250 kΩ, any value from 3 pF to 1 nF can be used. Fixed voltage versions have an internal 30-pF feedback capacitor that is quick-charged at start up. The adjustable version does not have this quick-charge circuit, so use values below 5 pF to ensure fast start up; values above 47 pF can be used to implement an output TPS799 SBVS056L – JANUARY 2005 – REVISED FEBRUARY 2022 www.ti.com 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS799 |
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