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LM5145 датащи(PDF) 8 Page - Texas Instruments

номер детали LM5145
подробное описание детали  LM25139 42V, Synchronous Buck DC/DC Controller With Dual Random Spread Spectrum for Advanced EMI Mitigation
PDF  60 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

LM5145 датащи(HTML) 8 Page - Texas Instruments

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5.5 Electrical Characteristics (continued)
TJ = –40°C to 150°C. Typical values are at TJ = 25°C and VIN = 12V (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VFPWM-LO
FPWM low detection threshold
0.8
V
VZC-PFM
Zero-cross threshold (LO off) in PFM
–5.5
mV
VZC-FPWM
Zero-cross threshold (LO off) in FPWM
30
mV
tPFM-FILTER
SYNCIN to PFM mode
13
72
µs
SWITCHING FREQUENCY (RT)
VRT
RT pin regulation voltage
10kΩ < RRT < 100kΩ
1
V
FSW2-VCC
Switching frequency 2, RT to VCC
RT = 10.1kΩ to VCC
2.2
MHz
FSW1
Switching frequency 1
RRT = 53kΩ to AGND
396
440
484
kHz
FSW2
Switching frequency 2
RRT = 10.1kΩ to AGND
2.2
MHz
FSW3
Switching frequency 3
RRT = 237kΩ to AGND
100
kHz
SLOPE1
Internal slope compensation 1
RRT = 10.1kΩ
1000
mV/µs
tON(min)
Minimum on-time
VHO – VSW = VCBOOT – VSW
25
ns
tOFF(min)
Minimum off-time
VHO – VSW = 0V
80
ns
POWER GOOD (PG)
VPG-OV
PG OV threshold level
Rising with respect to the regulation voltage
107
110
113.5
%
VPG-UV
PG UV threshold level
Falling with respect to the regulated voltage
89
92
95
%
VPG-UV-HYST
PG UV hysteresis
Rising with respect to the regulated output
3.6
%
VPG-OV-HYST
PG OV hysteresis
Rising with respect to the regulation voltage
3.6
%
tOV-DLY
PG OV filter time
VOUT rising
25
µs
tUV-DLY
PG UV filter time
VOUT falling
25
µs
VPG-OL
PG voltage
Open collector, IPG = 4mA
0.04
0.14
0.8
V
STARTUP (Soft Start)
tSS-INT
Internal fixed soft-start time
1.5
3
4.2
ms
BOOT CIRCUIT (CBOOT)
VBOOT-DROP
Internal diode forward drop
ICBOOT = 20mA, VCC to CBOOT
0.8
V
IBOOT
CBOOT to SW quiescent current, not
switching
VEN = 5V, VCBOOT – VSW = 5V
9
µA
VBOOT-SW-UV-R
CBOOT to SW UVLO rising threshold
VCBOOT – VSW rising
2.9
V
VBOOT-SW-UV-F
CBOOT to SW UVLO falling threshold
VCBOOT – VSW falling
2.6
V
VBOOT-SW-UV-HYS
CBOOT to SW UVLO hysteresis
330
mV
HIGH-SIDE GATE DRIVER (HO)
VHO-HIGH
HO high-state output voltage
IHO = –100mA, VHO-HIGH = VCBOOT – VHO
120
mV
VHO-LOW
HO low-state output voltage
IHO = 100mA
60
mV
IHO-SRC
HO peak source current
VHO = VSW = 0V, VCBOOT = VVCC = 5V
1.65
A
IHO-SINK
HO peak sink current
VVCC = 5V
2.4
A
LOW-SIDE GATE DRIVER (LO)
VLO-HIGH
LO high-state output voltage
ILO = –100mA
124
mV
VLO-LOW
LO low-state output voltage
ILO = 100mA
60
mV
ILO-SRC
LO peak source current
VLO = VSW = 0V, VVCC = 5V
1.65
A
ILO-SINK
LO peak sink current
VVCC = 5V
2.4
A
ADAPTIVE DEADTIME CONTROL
tDEAD1
HO off to LO on deadtime
18
ns
tDEAD2
LO off to HO on deadtime
22
ns
INTERNAL HICCUP MODE
HICDLY
Hiccup mode activation delay
VISNS – VVOUT > 60mV
512
cycles
HICCYCLES
HICCUP mode fault
VISNS – VVOUT > 60mV
16384
cycles
OVERCURRENT PROTECTION
VCS-TH
Current limit threshold
Measured from ISNS to VOUT
52
60
68
mV
LM25139
SLVSJ80 – OCTOBER 2025
www.ti.com
8
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Copyright © 2025 Texas Instruments Incorporated
Product Folder Links: LM25139



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