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TPS16632RGER датащи(PDF) 22 Page - Texas Instruments |
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TPS16632RGER датащи(HTML) 22 Page - Texas Instruments |
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22 / 46 page ![]() During the output power limiting operation, FLT asserts after a delay of tCL_PLIM_FLT(dly). The FLT signal remains asserted until the over power load condition is removed and the device resumes normal operation. Figure 9-11 illustrates output power limiting performance of TPS16632 with 100-W setting for class-2 power supply designs . TPS16632 31 PŸ IN OUT dVdT ILIM P_IN RILIM FLT GND SHDN UVLO PLIM MODE IMON RIMON PGOOD Protected supply To Load 4.5 V - 60 V Load Monitor ON/OFF Control R2 RPLIM R1 COUT CdVdT Figure 9-10. TPS16632 Typical Application Schematic RPLIM = 100 kΩ RILIM = 3 kΩ Figure 9-11. 100 W class 2, Output Power Limiting Response of TPS16632 9.3.6 Current Monitoring Output (IMON) The TPS1663x devices feature an accurate analog current monitoring output. A current source at IMON terminal is internally configured to be proportional to the current flowing from IN to OUT. This current can be converted into a voltage using a resistor R(IMON) from IMON terminal to GND terminal. The IMON voltage can be used as a means of monitoring current flow through the system. The maximum voltage (V(IMONmax) for monitoring the current is limited to 4 V. This limitation puts a limitation on maximum value of R(IMON) resistor and is determined by Equation 6. > @ IMON OUT IMON IMON V I GAIN R u u (6) Where, • GAIN(IMON) is the gain factor I(IMON):I(OUT) = 27.9μA/A (typical) • I(OUT) is the load current TPS1663 SLVSET9F – SEPTEMBER 2018 – REVISED FEBRUARY 2023 www.ti.com 22 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TPS1663 |
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