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TMUX1111 датащи(PDF) 26 Page - Texas Instruments |
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TMUX1111 датащи(HTML) 26 Page - Texas Instruments |
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26 / 44 page ![]() + ± + ± + ± ± OPA2192 OPA2192 OPA2192 OPA2192 TMUX111x 5V 5V 5V 0V 0V 5V 0V 5V 0V V DD V OUT1 SEL3/ SEL4 V IN1 V IN2 SEL1/ SEL2 C H C C R C C H C H C C R C C H + DAC9881 DAC9881 C L R L V OUT2 C L R L 5V 5V SW1 SW2 SW3 SW4 Figure 9-2. 2-Channel Sample-and-Hold Circuit with Pedestal Error Compensation 9.2.1 Design Requirements The purpose of this precision design is to implement an optimized 2-output sample-and-hold circuit using a 4-channel SPST switch. The sample and hold circuit needs to be capable of supporting high accuracy with minimized pedestal error and fast settling time.. 9.2.2 Detailed Design Procedure 9.2.2.1 Detailed Design Procedure The TMUX1111, TMUX1112, or TMUX1113 switch is used in conjunction with the voltage holding capacitors (CH) to implement the sample-and-hold circuit. The basic operation is: 1. When the switch (SW2 or SW3) is closed, it samples the input voltage and charges the holding capacitors (CH) to the input voltages values. 2. When the switch (SW2 or SW3) is open, the holding capacitors (CH) holds its previous value, maintaining stable voltage at the amplifier output (VOUT). Due to switch and capacitor leakage current, as well as amplifier bias current, the voltage on the hold capacitors droops with time. The TMUX1111, TMUX1112, or TMUX1113 minimize the droops due to its ultra-low leakage performance. At 25°C, the TMUX1111, TMUX1112, andTMUX1113 have extremely low leakage current at 3pA typical. A second switch SW1 (or SW4) is also included to operate in parallel with SW2 (or SW3) to reduce pedestal error during switch toggling. Because both switches are driven at the same potential, they act as common-mode signal to the op-amp, thereby minimizing the charge injection effects caused by the switch toggling action. Compensation network consisting of RC and CC is also added to further reduce the pedestal error, whiling reducing the hold-time glitch and improving the settling time of the circuit. Refer to Sample and Hold Glitch Reduction for Precision Outputs Reference Design for more information on sample-and-hold circuits. TMUX1111, TMUX1112, TMUX1113 SCDS408C – FEBRUARY 2019 – REVISED DECEMBER 2023 www.ti.com 26 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TMUX1111 TMUX1112 TMUX1113 |
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