AD9744ARURL7 datasheet(18/32 Pages) AD

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AD9744

Rev. B | Page 18 of 32

capabilities should all be considered when optimizing this

circuit.

The differential circuit shown in Figure 36 provides the neces-

sary level shifting required in a single-supply system. In this

case, AVDD, which is the positive analog supply for both the

AD9744 and the op amp, is also used to level-shift the differen-

tial output of the AD9744 to midsupply (that is, AVDD/2). The

AD8041 is a suitable op amp for this application.

AD9744

IOUTA

IOUTB

COPT

500

Ω

225

Ω

225

Ω

AD8041

Ω

AVDD

Figure 36. Single-Supply DC Differential Coupled Circuit

SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT

Figure 37 shows the AD9744 configured to provide a unipolar

output range of approximately 0 V to 0.5 V for a doubly termi-

nated 50 Ω cable since the nominal full-scale current, IOUTFS, of

20 mA flows through the equivalent RLOAD of 25 Ω. In this case,

RLOAD represents the equivalent load resistance seen by IOUTA

or IOUTB. The unused output (IOUTA or IOUTB) can be con-

nected to ACOM directly or via a matching RLOAD. Different

values of IOUTFS and RLOAD can be selected as long as the positive

compliance range is adhered to. One additional consideration

in this mode is the integral nonlinearity (INL), discussed in

the Analog Outputs section. For optimum INL performance,

the single-ended, buffered voltage output configuration is

suggested.

AD9744

IOUTA

IOUTB

Ω

VOUTA =0V TO 0.5V

IOUTFS =20mA

Ω

Figure 37. 0 V to 0.5 V Unbuffered Voltage Output

SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT

CONFIGURATION

Figure 38 shows a buffered single-ended output configuration

in which the op amp U1 performs an I-V conversion on the

AD9744 output current. U1 maintains IOUTA (or IOUTB) at a

virtual ground, minimizing the nonlinear output impedance

effect on the DAC’s INL performance as described in the

Analog Outputs section. Although this single-ended configura-

tion typically provides the best dc linearity performance, its ac

distortion performance at higher DAC update rates may be

limited by U1’s slew rate capabilities. U1 provides a negative

unipolar output voltage, and its full-scale output voltage is sim-

ply the product of RFB and IOUTFS. The full-scale output should be

set within U1’s voltage output swing capabilities by scaling IOUTFS

and/or RFB. An improvement in ac distortion performance may

result with a reduced IOUTFS since the signal current U1 will be

required to sink less signal current.

AD9744

IOUTA

IOUTB

COPT

200

Ω

VOUT = IOUTFS × RFB

IOUTFS =10mA

RFB

200

Ω

Figure 38. Unipolar Buffered Voltage Output

POWER AND GROUNDING CONSIDERATIONS,

POWER SUPPLY REJECTION

Many applications seek high speed and high performance

under less than ideal operating conditions. In these application

circuits, the implementation and construction of the printed

circuit board is as important as the circuit design. Proper RF

techniques must be used for device selection, placement, and

routing as well as power supply bypassing and grounding to

ensure optimum performance. Figure 43 to Figure 46 illustrate

the recommended printed circuit board ground, power, and signal

plane layouts implemented on the AD9744 evaluation board.

One factor that can measurably affect system performance is

the ability of the DAC output to reject dc variations or ac noise

superimposed on the analog or digital dc power distribution.

This is referred to as the power supply rejection ratio (PSRR).

For dc variations of the power supply, the resulting performance

of the DAC directly corresponds to a gain error associated with

the DAC’s full-scale current, IOUTFS. AC noise on the dc supplies

is common in applications where the power distribution is gen-

erated by a switching power supply. Typically, switching power

supply noise will occur over the spectrum from tens of kHz to

several MHz. The PSRR vs. frequency of the AD9744 AVDD

supply over this frequency range is shown in Figure 39.

FREQUENCY (MHz)

Figure 39. Power Supply Rejection Ratio (PSRR) vs. Frequency

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