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L99DZ81EP датащи(PDF) 45 Page - STMicroelectronics

номер детали L99DZ81EP
подробное описание детали  Door actuator driver
PDF  62 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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L99DZ81EP датащи(HTML) 45 Page - STMicroelectronics

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L99DZ81EP
SPI - control and status registers
61
5
SPI - control and status registers
Table 31. Global status byte
Bit
765
43
21
0
Name
GL_ER
CO_ER
C_RESET
TSD
TW
UOV_OC_DS
OL
NR
Reset
001
00
00
0
GL_ER:
Global Error Flag.
Failures of bits 6 to 0 are always linked to the Global Error Flag. This flag is
set, if at least one of these bits indicates a failure. It is reflected via the DO
pin while CSN is held low and no SPI clock signal is applied. This operation
does not cause the Communication Error bit in the <Global Status> to be
set. The signal TW bit3 and OL bit1can be masked.
CO_ER:
Communication Error.
If the number of clock pulses during the previous frame is not 24, the frame
is ignored and this bit is set.
C_RESET:
Chip RESET.
If a stuck at ‘1’ on input DI during any SPI frame occurs, or if a Power On
Reset (VCC monitor) occurs. C_RESET is reset (‘1’) with any SPI command.
When C_RESET is active (‘0’), the gate drivers are switched off (resistive
path to source). After a startup of the circuit C_RESET is active due to the
power-up reset pulse. Therefore, the gate drivers are switched off. They can
only be activated after the C_RESET has been reset by an SPI command.
TSD:
Thermal shutdown.
All gate drivers and the charge pump are switched off (resistive path to
source). The TSD bit has to be cleared through a read and clear command
to reactivate the gate drivers and the chargepump.
TW:
Thermal Warning.
This bit can be masked using the configuration register.
UOV_OC_DS: Logical OR of the filtered undervoltage/overvoltage, chargepump-low,
overcurrent of the power outputs and the H-bridge drain-source monitor
signals.
OL:
Open-load.
Logical OR of the filtered output driver open-load signals. This bit can be
masked using the configuration register.
NR:
Not Ready.
After switching the device from standby mode to active mode an internal
timer is started to allow the chargepump to settle before the outputs can be
activated. This bit is cleared automatically after the startup time.



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