L99ASC03TR datasheet(69/73 Pages) STMICROELECTRONICS

69 / 73 page

DocID023504 Rev 7

69/73

L99ASC03

Revision history

Table 39. Document revision history

Date

Revision

Changes

30-Jul-2012

Initial release

03-May-2013

Updated following sections:

– Section 2.1: Supply pins (VS, VSREG, VSMS)

– Section 2.1.1: VS, VSREG and VSMS overvoltage warning

– Section 2.1.2: VS, VSREG and VSMS overvoltage

– Section 2.1.3: VS, VSREG and VSMS undervoltage

– Section 2.2: VDD (5V) voltage regulator

– Section 2.3: NRES reset output

– Section 2.4: Watchdog

Updated Figure 8: Operating mode transitions

Removed Figure: BEMF block diagram

Table 5: Diagnostics overview:

– MCU, VDD, Charge pump: updated device action

Table 12: Supply and supply monitoring

–VSUV, VSREGUV, VSMSUV: updated test condition and values

Table 14: Voltage regulator VDD:

– VDD: added condition

–VDDLiR: removed row

Table 15: NRES reset output (VDD supervision), NINT:

–VRT2, VRT2H: updated values

Table 17: Charge pump output:

–VCP: updated minimum and maximum values

–VCPLOW: updated maximum value

Table 18: Gate driver for external MOSFET:

–IGHx(on), IGHx(off), IGLx(on), IGLx(off): updated values

–VGHxH: updated parameter definition

Table 19: Drain source monitoring:

–ISHx: updated typical value for ISTEST(x) = 1

Table 20: VS, VSREG, VSMS and Tj monitoring (AOUT):

–VSxOUT: updated test condition and values

–IAOUT: removed row

Table 21: Current-sense amplifier:

–VCS-IL=0: updated typical value

Table 29: SPI timing:

–tSCKQV, tSSCK: updated parameter definition

–tHSDI: added row

Updated Figure 20: SPI – timing and Figure 21: SPI global status

Updated Table 37: Complete device SPI register table

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