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ETC5054 датащи(PDF) 3 Page - STMicroelectronics |
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ETC5054 датащи(HTML) 3 Page - STMicroelectronics |
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3 / 18 page ![]() PIN DESCRIPTION Name Pin Type * N ° DIP and SO N ° PLCC (**) Fun ction Description VBB S 1 1 Negative Power Supply VBB =– 5 V ± 5%. GNDA GND 2 2 Analog Ground All signals are referenced to this pin. VFRO O 3 3 Receive Filter Output Analog Output of the Receive Filter VCC S 4 5 Positive Power Supply VCC =+ 5 V ± 5%. FSR I 5 6 Receive Frame Sync Pulse Enables BCLKR to shift PCM data into DR.FSR is an 8kHz pulse train. See figures 1, 2 and 3 for timing details. DR I 6 7 Receive Data Input PCM data is shifted into DR following the FSR leading edge. BCLKR/CLKSEL I 7 8 Shift-in Clock Shifts data into DR after the FSR leading edge. May vary from 64 kHz to 2.048 MHz. Alternatively, may be a logic input which selects either 1.536 MHz/1.544 MHz or 2.048 MHz for master clock in synchronous mode and BCLKX is used for both transmit and receive directions (see table 1). This input has an internal pull- up. MCLKR/PDN I 8 9 Receive Master Clock Must be 1.536 MHz, 1.544 MHz or 2.048 MHz. May be asynchronous with MCLKX, but should be synchronous with MCLKX for best performance. When MCLKR is connected continuously low, MCLKX is selected for all internal timing. When MCLKR is connected continuously high, the device is powered down. MCLKX I 9 12 Transmit Master Clock Must be 1.536 MHz, 1.544 MHz or 2.048 MHz. May be asynchronous with MCLKR. BCLKXI 10 14 Shift-out Clock Shifts out the PCM data on DX. May vary from 64 kHz to 2.048 MHz, but must be synchronous with MCLKX. DX O 11 15 Transmit Data Output The TRI-STATE ® PCM data output which is enabled by FSX. FSX I 12 16 Transmit Frame Sync Pulse Enables BCLKX to shift out the PCM data on DX.FSX is an 8 kHz pulse train. See figures 1, 2 and 3 for timing details. TSX O 13 17 Transmit Time Slot Open drain output which pulses low during the encoder time slot. Recommended to be grounded if not used. GSX O 14 18 Gain Set Analog output of the transmit input amplifier. Used to set gain externally. VFXI – I 15 19 Inverting Amplifier Input Inverting Input of the Transmit Input Amplifier. VFXI + I 16 20 Non-inverting Amplifier Input Non-inverting Input of the Transmit Input Amplifier. (*) I: Input, O: Output, S: Power Supply (**) Pins 4,10,11 and 13 are not connected TRI-STATE ®is a trademark of National Semiconductor Corp. ETC5054 - ETC5057 3/18 |
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