11 Layout

11.1 Layout Guidelines

Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise

and fall times.

11.2 Layout Example

VCC

Ground

Ground

14

13

15

12

11

10

9

1

2

3

4

5

6

7

8

16

C2

C1

Ground

C3

C4

0.1µF

C1+

V+

C1–

C2+

C2–

V–

DOUT2

RIN2

VCC

GND

DOUT1

RIN1

ROUT1

DIN1

DIN2

ROUT2

Figure 11-1. Layout Diagram

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MAX3232

SLLS410O – JANUARY 2000 – REVISED JUNE 2021

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