This is information on a product in full production.

December 2013

DocID8021 Rev 3

1/14

M74HC126

Quad bus buffer (3-state)

Datasheet

- production data

Features

• High-speed:

tPD = 8 ns (typ.) at VCC = 6 V

• Low power dissipation:

ICC = 4 μA (max.) at TA = 25 °C

• High noise immunity:

VNIH = VNIL = 28 % VCC (min)

• Symmetrical output impedance:

|IOH| = IOL = 6 mA (min.)

• Balanced propagation delays:

tPLH ≅ tPHL

• Wide operating voltage range:

VCC (opr) = 2 V to 6 V

• Pin and function compatible with 74 series 126

• ESD performance

–CDM: 1 kV

–HBM: 2 kV

– MM: 200 V

Description

The M74HC126 is a high-speed CMOS quad

buffer (3-state) fabricated with silicon gate

C2MOS technology.

The device requires the 3-state control input, G, to

be set high to place the output into high

impedance state.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

SO14

TSSOP14

Table 1. Device summary

Order code

Temp. range

Package

Packaging

Marking

M74HC126RM13TR

-55 °C to 125 °C

S014

Tape and reel

74HC126

M74HC126YRM13TR(1)

1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC

Q001 and Q002 or equivalent.

-40 °C to 125 °C

SO14 (automotive grade)

74HC126Y

M74HC126TTR

-55 °C to 125 °C

TSSOP14

HC126

M74HC126YTTR(1)

-40 °C to 125 °C

TSSOP14 (automotive grade)

HC126Y

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