STA680TR datasheet(34/48 Pages) STMICROELECTRONICS

34 / 48 page

Digital I/O and memory interfaces

STA680

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DS5877 Rev 13

5.5.1

Host micro serial peripheral interface (SPI1)

SPI1 is used to interface the STA680 with a host processor interface.

The communication with the host-microcontroller can alternatively be performed via I2C as

described in Section 5.6.1.

The Host Micro SPI is a slave only interface.

For the relevant pin description see Table 11.

5.5.2

Flash serial peripheral interface (SPI2)

SPI2 is typically used for connecting the STA680 to an external Flash memory where the

boot code and configuration parameters could be stored. The minimum required capacity for

this purpose is 1 Mbit. SPI2 is master-only.

Up to 4 chip select lines are available on the STA680. For the relevant pin description see

Table 12.

Table 11. Host micro SPI pin list

Pin name

Designation

Type

Drive

SPI1_MISO

Host Micro SPI data master in/slave out

4 mA(1)

1. 4 mA driving capability is guaranteed on a maximum capacitive load of 20 pF.

SPI1_MOSI

Host Micro SPI data master out/slave in

SPI1_SCK

Host Micro SPI clock

SPI1_SS_N

Host Micro SPI active-low slave select 1

Table 12. Flash SPI pin list

Pin name

Designation

Type

Drive

SPI2_MISO

Flash SPI data master in/slave out

SPI2_MOSI

Flash SPI data master out/slave in

4 mA(1)

1. 4 mA driving capability is guaranteed on a maximum capacitive load of 20 pF.

SPI2_SCK

Flash SPI clock

4 mA(1)

SPI2_SS_N

Flash SPI active-low slave select 1

4 mA(1)

SPI2_SS1_N

Flash SPI active-low slave select 2

4 mA(1)

SPI2_SS2_N

Flash SPI active-low slave select 3

4 mA(1)

SPI2_SS3_N

Flash SPI active-low slave select 4

4 mA(1)

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