LM76005 datasheet(13/51 Pages) TI2

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output to reduce or eliminate the offset. Lowering values of the feedback divider RFBT and RFBB can also serve

as a static load. In conditions with low VIN and high frequency, the LM76005 may not enter PFM mode if the

output voltage cannot be charged up to provide the trigger to activate the PFM detector. Once the LM76005 is

operating in PFM mode at higher VIN, it remains in PFM operation when VIN is reduced.

Alternatively, the device can run in a forced pulse-width-modulation (FPWM) mode where the switching

frequency does not lower with load, and no offset is added to affect the VOUT accuracy unless the minimum on-

time of the converter is reached.

7.3.3 Adjustable Output Voltage

The voltage regulation loop in the LM76005 regulates the FB voltage to be the same as the internal reference

voltage. The output voltage of the LM76005 is set by a resistor divider to program the ratio from VOUT to VFB.

The resistor divider is connected from the output node to ground with the mid-point connecting to the FB pin.

VOUT

RFBT

RFBB

Figure 7-2. Output Voltage Setting

The voltage reference system produces a precise ±1% voltage reference over temperature. TI recommends

using divider resistors with 1% tolerance or better with temperature coefficient of 100 ppm or lower. Selection of

RFBT equal or lower than 100 kΩ is also recommended. RFBB can be calculated by Equation 1:

FBB

FBT

OUT

(1)

Larger RFBT and RFBB values reduce the current that goes through the divider, helping to increase light load

efficiency. However, larger values also make the feedback path more susceptible to noise. If efficiency at very

light load is not critical in a certain application, TI recommends RFBT = 10 kΩ to 100 kΩ. If the resistor divider is

not connected properly, output voltage cannot be regulated because the feedback loop is broken. If the FB pin is

shorted to ground or disconnected, the output voltage is driven close to VIN because the regulator detects very

low voltage on the FB node. The load connected to VOUT can be damaged in this case. It is important to route

the feedback trace away from the noisy area of the PCB. For more layout recommendations, see Section 10.

The minimum output voltage achievable equals VFB, with RFBB open. The maximum VOUT is limited by the

maximum duty cycle at a given frequency:

DMAX = 1 – (tOFF_MIN / TSW)

(2)

where

• tOFF_MIN is the minimum off-time of the HS switch

• TSW = 1 / fSW is the switching period

Ideally, without frequency foldback, VOUT_MAX = VIN_MIN × DMAX

Maximum output voltage with frequency foldback can be estimated using Equation 3:

ON _ MAX

OUT _ MAX

IN_MIN

OUT

DS _ ON _ HS

ON _ MAX

OFF _ MIN

DCR

(3)

www.ti.com

LM76005

SNVSBK5A – FEBRUARY 2020 – REVISED JULY 2020

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