LM5166DRCRG4 datasheet(22/57 Pages) TI2

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RUV1

RHYS

1 M

4.02 k

VOUTMASTER = 2.5 V

RFB1

RFB2

105 k

100 k

1.223 V

RPGOOD

100 k

RFB3

RFB4

22.4 k

100 k

1.223 V

VOUTSLAVE = 1.5 V

VIN(ON) = 4.5 V

VIN(OFF) = 4.1 V

Regulator #1

Startup based on

Input Voltage UVLO

Regulator #2

Sequential Startup

based on PGOOD

PGOOD

HYS

RUV2

374 k

UV1

IN(off)

UV2

HYS

1.144V

˜ ¨

UV1

IN(on)

UV2

1.22V

˜ ¨

LM5166

SNVSA67B – DECEMBER 2016 – REVISED JUNE 2017

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Product Folder Links: LM5166

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However, many applications benefit from using a resistor divider RUV1 and RUV2 as shown in Figure 44 to

establish a precision UVLO level. Adding RHYS and the connection to the HYS pin increases the voltage

hysteresis as needed.

The input UVLO voltages are calculated using Equation 16 and Equation 17.

(16)

(17)

The LM5166 enters a low IQ shutdown mode when EN is pulled below an NPN transistor base-emitter voltage

drop (approximately 0.6 V at room temperature). If EN is below this hard shutdown threshold, the internal LDO

regulator powers off and the internal bias supply rail collapses, turning off the bias currents of the LM5166.

7.3.7 Power Good (PGOOD)

The LM5166 has a built-in PGOOD flag to indicate whether the output voltage is within a regulation window. The

PGOOD signal can be used for start-up sequencing of downstream converters, as shown in Figure 45, or fault

protection. PGOOD is an open-drain output that requires a pullup resistor to a DC supply (12 V maximum).

Typical range of pullup resistance is 10 k

Ω to 100 kΩ. If necessary, use a resistor divider to decrease the

PGOOD pin voltage from a higher pullup rail.

Figure 45. Master-Slave Sequencing Implementation Using PGOOD and EN

When the FB voltage exceeds 94% of the internal reference VFB1, the PGOOD switch turns off and PGOOD will

be pulled high. If the FB voltage falls below 87% of VFB1, the PGOOD switch turns on, and PGOOD pulls low to

indicate power bad. The rising edge of PGOOD has a built-in noise filter delay of 5 µs.

7.3.8 Configurable Soft Start (SS)

The LM5166 has a flexible and easy-to-use start-up control through the SS pin. A soft-start feature prevents

inrush current impacting the LM5166 and its supply when power is first applied. Soft start is achieved by slowly

ramping up the target regulation voltage when the device is enabled or powered up. Selectable and adjustable

soft-start timing options include minimum delay (no soft-start), 900-µs internally fixed soft-start, and an externally-

adjustable soft start.

The simplest way to use the LM5166 is to leave the SS pin open circuit for a 900-µs soft-start time. The LM5166

will employ the internal soft-start control ramp and start-up to the regulated output voltage. In applications with a

large amount of output capacitors, higher VOUT, or other special requirements, extend the soft-start time by

connecting an external capacitor CSS from SS to GND. Longer soft-start time further reduces the supply current

needed to charge the output capacitors. An internal current source (ISS = 10 µA) charges CSS and generates a

ramp to control the ramp rate of the output voltage. For a desired soft-start time tSS, the CSS capacitance is:

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