VNF1248FTR datasheet(39/79 Pages) STMICROELECTRONICS

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Table 32. Control register fields (not NVM mapped)

Description

Use

CR#1→OUTCTL

Output channel (external power switch)

control

CR#1→BYPASSCTL

Internal bypass switch control

CR#1→S_T_START

Self-test start trigger

Effective only in the unlocked/self-test

states

CR#1→S_T_STOP

Self-test stop trigger

CR#1→S_T_CFG

Self-test type selection

CR#1→EN

Unlocked state transition control

CR#1→GOSTBY

Standby state transition control

CR#1→CCM_CTRL_ON

Capacitive charge mode start trigger

CR#1→CCM_CTRL_OFF

Capacitive charge mode stop trigger

CR#1→locked_MODE_EN

Locked mode enable

CR#1→FS_CFG_UPLOAD

NVM configuration upload to RAM

registers

CR#3→UNLOCK

Unlock access for specific control

CR#1,2,3,4,5→WD_TRIG

Watchdog monitor trigger

If the NVM default configuration is not used (NVM_DEF_CFG_EN = ‘0’), the RAM configuration registers for NVM

(Table 30. NVM mapped configuration parameters) is locked to prevent any unsafe changes to the device

configuration while it is in a locked state. However, write access to the RAM control register fields in the device

and output configuration options table is still allowed.

10.1.4

Default configuration upload to RAM

It is possible to upload default configuration from internal registers into correspondent RAM configuration

registers, through a specific programmable control bit (NVM_DEF_CFG_UPLOAD, CR#1), to allow read access

by the SPI interface of parameters default settings; the current content of RAM configuration registers is

overwritten with default values stored internally.

This feature enables to:

•

Configure the device in an unlocked state with a well-known, defined set of parameters, without the need to

do that by a sequence of SPI frames.

•

Monitor periodically the default configuration applied to the device while in fail-safe/locked states, to verify

expected parameters settings have not been corrupted (safety purpose).

VNF1248F

Non-volatile memory (NVM) customer programming

DS14109 - Rev 7

page 39/79

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