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INA260AIPWR датащи(PDF) 21 Page - Texas Instruments

номер детали INA260AIPWR
подробное описание детали  INA260 Precision Digital Current and Power Monitor With Low-Drift, Precision Integrated Shunt
PDF  38 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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INA260AIPWR датащи(HTML) 21 Page - Texas Instruments

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INA260
www.ti.com
SBOS656C – JULY 2016 – REVISED DECEMBER 2016
Product Folder Links: INA260
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
(1)
Type: R = Read-Only, R/W = Read/Write.
8.5.3.4 SMBus Alert Response
When SMBus Alerts are latched, the INA260 is designed to respond to the SMBus Alert Response address. The
SMBus Alert Response provides a quick fault identification for simple slave devices. When an Alert occurs, the
master can broadcast the Alert Response slave address (0001 100) with the Read/Write bit set high. Following
this Alert Response, any slave device that generates an alert identifies itself by acknowledging the Alert
Response and sending its address on the bus.
The Alert Response can activate several different slave devices simultaneously, similar to the I2C General Call. If
more than one slave attempts to respond, bus arbitration rules apply and the device with the lowest address will
win and be serviced first. The losing devices do not generate an Acknowledge and continues to hold the Alert
line low until the interrupt is cleared. The winning device responds with its address and releases the SMBus alert
line. Even though the INA260 releases the SMBus line the internal error flags are not cleared until done so by
the host.
8.6 Register Maps
The INA260 uses a bank of registers for holding configuration settings, measurement results, minimum/maximum
limits, and status information. Table 4 summarizes the device registers; see the Functional Block Diagram
section for an illustration of the registers.
Table 4. Register Set Summary
POINTER
ADDRESS
REGISTER NAME
FUNCTION
POWER-ON RESET
TYPE(1)
HEX
BINARY
HEX
00h
Configuration Register
All-register reset, shunt voltage and bus
voltage ADC conversion times and
averaging, operating mode.
01100001 00100111
6127
R/W
01h
Current Register
Contains the value of the current flowing
through the shunt resistor.
00000000 00000000
0000
R
02h
Bus Voltage Register
Bus voltage measurement data.
00000000 00000000
0000
R
03h
Power Register
Contains the value of the calculated
power being delivered to the load.
00000000 00000000
0000
R
06h
Mask/Enable Register
Alert configuration and Conversion
Ready flag.
00000000 00000000
0000
R/W
07h
Alert Limit Register
Contains the limit value to compare to
the selected Alert function.
00000000 00000000
0000
R/W
FEh
Manufacturer ID Register
Contains unique manufacturer
identification number.
0101010001001001
5449
R
FFh
Die ID Register
Contains unique die identification
number.
0010001001110000
2270
R
8.6.1 Configuration Register (00h) (Read/Write)
The Configuration Register settings control the operating modes for the device. This register controls the
conversion time settings for both shunt current and bus voltage measurements as well as the averaging mode
used. The operating mode that controls what signals are selected to be measured is also programmed in the
Configuration Register.
The Configuration Register can be read from at any time without impacting or affecting the device settings or a
conversion in progress. Writing to the Configuration Register halts any conversion in progress until the write
sequence is completed resulting in a new conversion starting based on the new contents of the Configuration
Register (00h). This halt prevents any uncertainty in the conditions used for the next completed conversion.



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