STPM098C datasheet(77/110 Pages) STMICROELECTRONICS

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Table 61. Load-Line enable command bit

EN_DRP

Description

Load-line function disabled (default)

Load-line function enabled

The droop resistance RDROOP can be programmed through a dedicated PMBus™ register as follows:

VOUT_DROOP=VDROOP_DAC_out_lsb× 1+VOUT_DROOPn_CFG

(34)

Where:

VDROOP_DAC_out _lsb is the minimum drooping step [9.765 µΩ].

VOUT_DROOPn_CFG [9:0] are the dedicated PMBus™ configuration bits [9.76 5µΩ ~ 9.99 mΩ].

The default value is VOUT_DROOPn_CFG = 0x00.

In case VOUT_DROOPn_CFG = 0x00 the related load-line function is disabled and no voltage drooping is

performed.

Note:

The droop resistance shall be chosen so that, at the maximum output current, the output voltage is the minimum

acceptable. On the other hand, when the output current is close to zero, the output voltage shall be near to the

maximum.

Table 62. VDROOP DAC electrical characteristics

Symbol

Parameter

Test condition

Min

Typ

Max Unit Notes

VDROOP DAC output

VDROOP_DAC_out_range_max

VDROOP DAC output range max

9.765

9999

μΩ

VDROOP DAC output resolution

VDROOP_DAC_out_dac_res

VDROOP DAC resolution

bits -

VDROOP_DAC_out _lsb

VDROOP DAC LSB

9.765

μΩ

VDROOP DAC accuracy

VDROOP_DAC_gain_err

VDROOP DAC gain error

-6

VDROOP_DAC_offset

VDROOP DAC offset

-10

mV -

VDROOP_DAC_total_err

VDROOP DAC total error

mV -

VRDOOP total error can be calculated as follows:

VDROOPDACtotalerr=± VDROOPDACoffset×N×RDROOPA+0.4mV ± VDROOPDACgainerr×RDROOP×Iload

Where:

•

Rdroop is the selected droop resistance (that is, 9.765 μΩ to 9999 μΩ).

•

ILoad is the load current.

•

A is the DrMOS current sense gain (that is, 5 mV/A).

Example:

•

A = 5 mΩ

•

Iload = 170 A

•

Rdroop = 0.3 mΩ

•

N = 5

•

Target Vdroop = 51 mV

•

Total error = (10 mV * 5 * 0.3 mΩ/5mΩ + 0.4 mV) + (6% * 51 mV) = 3.4 mV + 3.06 mV = 6.46 mV

STPM098C

Functional description

DS14440 - Rev 1

page 77/110

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